From 56fd8e120855a0afcb9c489bbdd6b83f232f52d8 Mon Sep 17 00:00:00 2001 From: Jonas Maebe Date: Sat, 2 Feb 2019 14:28:48 +0000 Subject: [PATCH] * fixed tinterlockedmt*.pp for architectures with weak memory consistency models git-svn-id: trunk@41164 - --- tests/test/tinterlocked64mt.pp | 6 ++++++ tests/test/tinterlockedmt.pp | 7 +++++++ 2 files changed, 13 insertions(+) diff --git a/tests/test/tinterlocked64mt.pp b/tests/test/tinterlocked64mt.pp index 3dfb48ac3d..bea00f199a 100644 --- a/tests/test/tinterlocked64mt.pp +++ b/tests/test/tinterlocked64mt.pp @@ -208,6 +208,8 @@ begin end; end; + { ensure the writes to Counter and Counter2 are ordered vs the writes to FinishedCount } + WriteBarrier; InterLockedIncrement64(FinishedCount); end; @@ -293,6 +295,10 @@ begin if t = 0 then t:=1/MSecsPerDay; + { ensure the read from FinishedCount above is ordered relative to the reads from + Counter and Counter2 (counterpart to WriteBarrier in the thread function) } + ReadBarrier(); + CheckResult(Counter, 0, 20, 'Counter error:'); CheckResult(Counter2, (LastCompareVal - 2)*CmpCount, 21, 'Counter2 error:'); diff --git a/tests/test/tinterlockedmt.pp b/tests/test/tinterlockedmt.pp index fbffd1cb8d..de3d6f6eb7 100644 --- a/tests/test/tinterlockedmt.pp +++ b/tests/test/tinterlockedmt.pp @@ -204,6 +204,9 @@ begin end; end; + { ensure the writes to Counter and Counter2 are ordered vs the writes to FinishedCount } + WriteBarrier; + InterLockedIncrement(FinishedCount); end; @@ -288,6 +291,10 @@ begin if t = 0 then t:=1/MSecsPerDay; + { ensure the read from FinishedCount above is ordered relative to the reads from + Counter and Counter2 (counterpart to WriteBarrier in the thread function) } + ReadBarrier(); + CheckResult(Counter, 0, 20, 'Counter error:'); CheckResult(Counter2, (LastCompareVal - 2)*CmpCount, 21, 'Counter2 error:');