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Signed modulus by 2 on ARM with no division is optimized to a series of instructions instead of calling fpc_mod_longint.
An ASR is removed from signed division by 2. git-svn-id: trunk@24778 -
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7f2750f188
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@ -58,7 +58,7 @@ implementation
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symtype,symconst,symtable,
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cgbase,cgobj,hlcgobj,cgutils,
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pass_2,procinfo,
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ncon,ncnv,ncal,
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ncon,ncnv,ncal,ninl,
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cpubase,cpuinfo,
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ncgutil,
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nadd,pass_1,symdef;
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@ -99,6 +99,17 @@ implementation
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end;
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left:=nil;
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end
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else if (nodetype=modn) and
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(is_signed(left.resultdef)) and
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(right.nodetype=ordconstn) and
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(tordconstnode(right).value=2) then
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begin
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// result:=(0-(left and 1)) and (1+(sarlongint(left,31) shl 1))
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result:=caddnode.create(andn,caddnode.create(subn,cordconstnode.create(0,sinttype,false),caddnode.create(andn,left,cordconstnode.create(1,sinttype,false))),
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caddnode.create(addn,cordconstnode.create(1,sinttype,false),
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cshlshrnode.create(shln,cinlinenode.create(in_sar_x_y,false,ccallparanode.create(cordconstnode.create(31,sinttype,false),ccallparanode.Create(left.getcopy,nil))),cordconstnode.create(1,sinttype,false))));
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left:=nil;
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end
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else
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result:=inherited first_moddivint;
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end;
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@ -135,7 +146,10 @@ implementation
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begin
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helper1:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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helper2:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SAR,OS_INT,31,numerator,helper1);
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if power = 1 then
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cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,numerator,helper1)
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else
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cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SAR,OS_INT,31,numerator,helper1);
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if current_settings.cputype in cpu_thumb then
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begin
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cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SAR,OS_INT,32-power,helper1);
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