From 5729c9c8ef8ac1a419eb3831a758049f46cef641 Mon Sep 17 00:00:00 2001
From: Jonas Maebe <jonas@freepascal.org>
Date: Tue, 18 Feb 2014 16:46:36 +0000
Subject: [PATCH]   * fixed shl/shr with constant value>=32 on 64 bit platforms

git-svn-id: trunk@26809 -
---
 compiler/ncgmat.pas | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/compiler/ncgmat.pas b/compiler/ncgmat.pas
index 8d4b5b8260..e78faed50d 100644
--- a/compiler/ncgmat.pas
+++ b/compiler/ncgmat.pas
@@ -427,6 +427,7 @@ implementation
          opdef,right_opdef : tdef;
          hcountreg : tregister;
          opsize,right_opsize : tcgsize;
+         shiftval : longint;
       begin
          { determine operator }
          case nodetype of
@@ -489,8 +490,14 @@ implementation
          if (right.nodetype=ordconstn) then
            begin
               { shl/shr must "wrap around", so use ... and 31 }
+              { In TP, "byte/word shl 16 = 0", so no "and 15" in case of
+                a 16 bit ALU }
+              if tcgsize2size[opsize]<=4 then
+                shiftval:=tordconstnode(right).value.uvalue and 31
+              else
+                shiftval:=tordconstnode(right).value.uvalue and 63;
               hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,opdef,
-                tordconstnode(right).value.uvalue and 31,left.location.register,location.register);
+                shiftval,left.location.register,location.register);
            end
          else
            begin