paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-08-12 02:45:58 +02:00
Code Issues Packages Projects Releases Wiki Activity

* support of dq in Intel assembler on 64 bit CPUs, resolves #11425

Browse Source 
git-svn-id: trunk@11211 -
This commit is contained in:
florian 2008-06-07 15:08:48 +00:00
parent c91498ed65
commit 58757d0630
3 changed files with 34 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
.gitattributes vendored
View File

@ -6974,6 +6974,7 @@ tests/tbs/tb0549.pp svneol=native#text/plain
tests/tbs/tb0550.pp svneol=native#text/plain tests/tbs/tb0550.pp svneol=native#text/plain
tests/tbs/tb0550a.pp svneol=native#text/plain tests/tbs/tb0550a.pp svneol=native#text/plain
tests/tbs/tb0550b.pp svneol=native#text/plain tests/tbs/tb0550b.pp svneol=native#text/plain
tests/tbs/tb0551.pp svneol=native#text/plain
tests/tbs/tb205.pp svneol=native#text/plain tests/tbs/tb205.pp svneol=native#text/plain
tests/tbs/ub0060.pp svneol=native#text/plain tests/tbs/ub0060.pp svneol=native#text/plain
tests/tbs/ub0069.pp svneol=native#text/plain tests/tbs/ub0069.pp svneol=native#text/plain

18
compiler/x86/rax86int.pas
View File

@ -40,7 +40,7 @@ Unit Rax86int;
AS_RPAREN,AS_COLON,AS_DOT,AS_PLUS,AS_MINUS,AS_STAR, AS_RPAREN,AS_COLON,AS_DOT,AS_PLUS,AS_MINUS,AS_STAR,
AS_SEPARATOR,AS_ID,AS_REGISTER,AS_OPCODE,AS_SLASH, AS_SEPARATOR,AS_ID,AS_REGISTER,AS_OPCODE,AS_SLASH,
{------------------ Assembler directives --------------------} {------------------ Assembler directives --------------------}
AS_ALIGN,AS_DB,AS_DW,AS_DD,AS_END, AS_ALIGN,AS_DB,AS_DW,AS_DD,AS_DQ,AS_END,
{------------------ Assembler Operators --------------------} {------------------ Assembler Operators --------------------}
AS_BYTE,AS_WORD,AS_DWORD,AS_QWORD,AS_TBYTE,AS_DQWORD,AS_NEAR,AS_FAR, AS_BYTE,AS_WORD,AS_DWORD,AS_QWORD,AS_TBYTE,AS_DQWORD,AS_NEAR,AS_FAR,
AS_HIGH,AS_LOW,AS_OFFSET,AS_SIZEOF,AS_VMTOFFSET,AS_SEG,AS_TYPE,AS_PTR,AS_MOD,AS_SHL,AS_SHR,AS_NOT, AS_HIGH,AS_LOW,AS_OFFSET,AS_SIZEOF,AS_VMTOFFSET,AS_SEG,AS_TYPE,AS_PTR,AS_MOD,AS_SHL,AS_SHR,AS_NOT,
@ -109,7 +109,7 @@ Unit Rax86int;
_count_asmoperators = longint(lastoperator)-longint(firstoperator); _count_asmoperators = longint(lastoperator)-longint(firstoperator);
_asmdirectives : array[0.._count_asmdirectives] of tasmkeyword = _asmdirectives : array[0.._count_asmdirectives] of tasmkeyword =
('ALIGN','DB','DW','DD','END'); ('ALIGN','DB','DW','DD','DQ','END');
{ problems with shl,shr,not,and,or and xor, they are } { problems with shl,shr,not,and,or and xor, they are }
{ context sensitive. } { context sensitive. }
@ -123,7 +123,7 @@ Unit Rax86int;
',','[',']','(', ',','[',']','(',
')',':','.','+','-','*', ')',':','.','+','-','*',
';','identifier','register','opcode','/', ';','identifier','register','opcode','/',
'','','','','END', '','','','','','END',
'','','','','','','','','', '','','','','','','','','',
'','','sizeof','vmtoffset','','type','ptr','mod','shl','shr','not', '','','sizeof','vmtoffset','','type','ptr','mod','shl','shr','not',
'and','or','xor' 'and','or','xor'
@ -1069,6 +1069,7 @@ Unit Rax86int;
AS_DB, AS_DB,
AS_DW, AS_DW,
AS_DD, AS_DD,
AS_DQ,
AS_END, AS_END,
AS_RBRACKET, AS_RBRACKET,
AS_SEPARATOR, AS_SEPARATOR,
@ -2039,6 +2040,7 @@ Unit Rax86int;
AS_DB, AS_DB,
AS_DW, AS_DW,
AS_DD, AS_DD,
AS_DQ,
AS_OPCODE, AS_OPCODE,
AS_END, AS_END,
AS_SEPARATOR: AS_SEPARATOR:
@ -2118,6 +2120,16 @@ Unit Rax86int;
inexpression:=false; inexpression:=false;
end; end;
{$ifdef cpu64bitaddr}
AS_DQ:
Begin
inexpression:=true;
Consume(AS_DQ);
BuildConstant(8);
inexpression:=false;
end;
{$endif cpu64bitaddr}
AS_ALIGN: AS_ALIGN:
Begin Begin
Consume(AS_ALIGN); Consume(AS_ALIGN);

10
tests/tbs/tb0551.pp Normal file
View File

@ -0,0 +1,10 @@
{ %cpu=x86_64 }
{ %norun }
{$asmmode intel}
begin
asm
dq 123456789101213
end;
end.