* intel asm reader: try to read avx512 extensions only if the instruction supports them

* cleanup

git-svn-id: trunk@42656 -
This commit is contained in:
florian 2019-08-12 10:46:19 +00:00
parent 4c9a0403f4
commit 5947143d8f
6 changed files with 56 additions and 11 deletions

1
.gitattributes vendored
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@ -17785,6 +17785,7 @@ tests/webtbs/tw35918.pp svneol=native#text/pascal
tests/webtbs/tw35937.pp svneol=native#text/plain
tests/webtbs/tw3594.pp svneol=native#text/plain
tests/webtbs/tw3595.pp svneol=native#text/plain
tests/webtbs/tw35953.pp svneol=native#text/pascal
tests/webtbs/tw3612.pp svneol=native#text/plain
tests/webtbs/tw3617.pp svneol=native#text/plain
tests/webtbs/tw3619.pp svneol=native#text/plain

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@ -39,7 +39,7 @@ interface
type
tcommentstyle = (comment_none,comment_tp,comment_oldtp,comment_delphi,comment_c, comment_x86OpExt);
tcommentstyle = (comment_none,comment_tp,comment_oldtp,comment_delphi,comment_c);
tscannerfile = class;

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@ -63,13 +63,11 @@ interface
OT_VECTORSAE = $8000000000; { OPTIONAL SAE-FLAG AVX512}
OT_VECTORER = $10000000000; { OPTIONAL ER-FLAG-FLAG AVX512}
OT_VECTOR_EXT = OT_VECTORMASK or OT_VECTORZERO or OT_VECTORBCST or OT_VECTORSAE or OT_VECTORER;
OT_BITSB32 = OT_BITS32 or OT_VECTORBCST;
OT_BITSB64 = OT_BITS64 or OT_VECTORBCST;
OT_VECTOR_EXT_MASK = OT_VECTORMASK or OT_VECTORZERO or OT_VECTORBCST;
OT_BITS80 = $00000010; { FPU only }
OT_FAR = $00000020; { this means 16:16 or 16:32, like in CALL/JMP }
OT_NEAR = $00000040;
@ -652,6 +650,7 @@ interface
function spilling_create_store(r:tregister; const ref:treference):Taicpu;
function MemRefInfo(aAsmop: TAsmOp): TInsTabMemRefSizeInfoRec;
function MightHaveExtension(AsmOp : TAsmOp) : Boolean;
procedure InitAsm;
procedure DoneAsm;
@ -686,8 +685,6 @@ implementation
itcpugas,
cpuinfo;
procedure AddSymbol(symname : string; defined : boolean);
var
EC : PExternChain;
@ -877,6 +874,31 @@ implementation
result := InsTabMemRefSizeInfoCache^[aAsmop];
end;
function MightHaveExtension(AsmOp : TAsmOp): Boolean;
var
i,j: LongInt;
insentry: pinsentry;
begin
Result:=true;
i:=InsTabCache^[AsmOp];
if i>=0 then
begin
insentry:=@instab[i];
while insentry^.opcode=AsmOp do
begin
for j:=0 to insentry^.ops-1 do
begin
if (insentry^.optypes[j] and OT_VECTOR_EXT)<>0 then
exit;
end;
inc(i);
insentry:=@instab[i];
end;
end;
Result:=false;
end;
{ Operation type for spilling code }
type
toperation_type_table=array[tasmop,0..Max_Operands] of topertype;

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@ -73,6 +73,8 @@ type
{ opcode adding }
function ConcatInstruction(p : TAsmList) : tai;override;
function getstring: string;
{ returns true, if the opcode might have an extension as used by AVX512 }
function MightHaveExtension : boolean;
end;
const
@ -2016,4 +2018,10 @@ begin
GetString:=s+']';
end;
function Tx86Instruction.MightHaveExtension: boolean;
begin
Result:=aasmcpu.MightHaveExtension(opcode);
end;
end.

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@ -2015,7 +2015,7 @@ Unit Rax86int;
begin
hreg:=actasmregister;
Consume(AS_REGISTER, true);
Consume(AS_REGISTER, MightHaveExtension(actopcode));
while actasmtoken in OPEXT_STARTASMTOKEN do
begin
@ -2190,7 +2190,7 @@ Unit Rax86int;
if GotPlus or GotStar or BracketlessReference then
Message(asmr_e_invalid_reference_syntax);
Consume(AS_RBRACKET, true);
Consume(AS_RBRACKET, MightHaveExtension(actopcode));
while actasmtoken in OPEXT_STARTASMTOKEN do
begin
consume_voperand_ext(oper);
@ -2544,7 +2544,7 @@ Unit Rax86int;
{ is it a normal variable ? }
Begin
expr:=actasmpattern;
Consume(AS_ID, true);
Consume(AS_ID, MightHaveExtension(actopcode));
while actasmtoken in OPEXT_STARTASMTOKEN do
begin
@ -2613,7 +2613,8 @@ Unit Rax86int;
begin
{ save the type of register used. }
tempreg:=actasmregister;
Consume(AS_REGISTER, true);
Consume(AS_REGISTER, MightHaveExtension(actopcode));
if (getregtype(tempreg) in [R_MMREGISTER, R_ADDRESSREGISTER]) then
begin
@ -2876,7 +2877,7 @@ Unit Rax86int;
Message(asmr_e_too_many_operands)
else
Dec(operandnum);
Consume(AS_COMMA, true);
Consume(AS_COMMA,instr.MightHaveExtension);
end;
{Far constant, i.e. jmp $0000:$11111111.}

13
tests/webtbs/tw35953.pp Normal file
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@ -0,0 +1,13 @@
{ %CPU=x86_64,i386 }
{$mode objfpc}{$H+}
{$asmmode INTEL}
function f: longint; assembler;
asm
mov ecx, ebx {shift by initial common exponent e}
vaddpd XMM0 {k1} {z}, XMM0, [RAX + RDI + $10] {1to2}
end;
begin
end.