From 599ba8cc2a1d68bb9dc6dae9600cac6b1847d046 Mon Sep 17 00:00:00 2001 From: florian Date: Wed, 17 Feb 2021 20:43:37 +0000 Subject: [PATCH] + generate initial cfi for aarch64 git-svn-id: trunk@48701 - --- compiler/aarch64/cpubase.pas | 2 +- compiler/cfidwarf.pas | 9 +++++++-- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/compiler/aarch64/cpubase.pas b/compiler/aarch64/cpubase.pas index 92d5da84e4..5032c573e0 100644 --- a/compiler/aarch64/cpubase.pas +++ b/compiler/aarch64/cpubase.pas @@ -303,7 +303,7 @@ unit cpubase; NR_MM_RESULT_REG = NR_D0; - NR_RETURN_ADDRESS_REG = NR_FUNCTION_RETURN_REG; + NR_RETURN_ADDRESS_REG = NR_LR; { Offset where the parent framepointer is pushed } PARENT_FRAMEPOINTER_OFFSET = 0; diff --git a/compiler/cfidwarf.pas b/compiler/cfidwarf.pas index 78f1dbdb72..ddc3a13000 100644 --- a/compiler/cfidwarf.pas +++ b/compiler/cfidwarf.pas @@ -244,8 +244,6 @@ implementation datatype:=dt_none; end; - - {**************************************************************************** TDwarfAsmCFILowLevel ****************************************************************************} @@ -296,6 +294,13 @@ implementation list.concat(tai_const.create_uleb128bit(dwarf_reg(NR_STACK_POINTER_REG))); list.concat(tai_const.create_uleb128bit(0)); end; +{$elseif defined(aarch64)} + procedure TDwarfAsmCFILowLevel.generate_initial_instructions(list:TAsmList); + begin + list.concat(tai_const.create_8bit(DW_CFA_def_cfa)); + list.concat(tai_const.create_uleb128bit(dwarf_reg(NR_STACK_POINTER_REG))); + list.concat(tai_const.create_uleb128bit(0)); + end; {$else} { if more cpu dependend stuff is implemented, this needs more refactoring } procedure TDwarfAsmCFILowLevel.generate_initial_instructions(list:TAsmList);