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https://gitlab.com/freepascal.org/fpc/source.git
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- removed mov "reg, reg" optimizations, as they are removed by the
register allocator and may be necessary to indicate a register may not be reused before some point
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parent
0d004c1e35
commit
5a98f00e7f
@ -435,30 +435,23 @@ const
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var
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instr: taicpu;
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begin
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if (reg1<>reg2) or
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(tcgsize2size[tosize] < tcgsize2size[fromsize]) or
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((tcgsize2size[tosize] = tcgsize2size[fromsize]) and
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(tosize <> fromsize) and
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not(fromsize in [OS_32,OS_S32])) then
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begin
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case tosize of
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OS_8:
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instr := taicpu.op_reg_reg_const_const_const(A_RLWINM,
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reg2,reg1,0,31-8+1,31);
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OS_S8:
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instr := taicpu.op_reg_reg(A_EXTSB,reg2,reg1);
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OS_16:
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instr := taicpu.op_reg_reg_const_const_const(A_RLWINM,
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reg2,reg1,0,31-16+1,31);
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OS_S16:
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instr := taicpu.op_reg_reg(A_EXTSH,reg2,reg1);
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OS_32,OS_S32:
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instr := taicpu.op_reg_reg(A_MR,reg2,reg1);
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else internalerror(2002090901);
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end;
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list.concat(instr);
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rg[R_INTREGISTER].add_move_instruction(instr);
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end;
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case tosize of
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OS_8:
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instr := taicpu.op_reg_reg_const_const_const(A_RLWINM,
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reg2,reg1,0,31-8+1,31);
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OS_S8:
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instr := taicpu.op_reg_reg(A_EXTSB,reg2,reg1);
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OS_16:
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instr := taicpu.op_reg_reg_const_const_const(A_RLWINM,
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reg2,reg1,0,31-16+1,31);
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OS_S16:
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instr := taicpu.op_reg_reg(A_EXTSH,reg2,reg1);
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OS_32,OS_S32:
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instr := taicpu.op_reg_reg(A_MR,reg2,reg1);
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else internalerror(2002090901);
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end;
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list.concat(instr);
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rg[R_INTREGISTER].add_move_instruction(instr);
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end;
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@ -2299,7 +2292,12 @@ begin
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end.
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{
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$Log$
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Revision 1.156 2004-01-25 16:36:34 jonas
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Revision 1.157 2004-02-03 19:49:24 jonas
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- removed mov "reg, reg" optimizations, as they are removed by the
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register allocator and may be necessary to indicate a register may not
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be reused before some point
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Revision 1.156 2004/01/25 16:36:34 jonas
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- removed double construction of fpu register allocator
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Revision 1.155 2004/01/12 22:11:38 peter
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