From 5b54ab2040772b029046f130fb3c13066923d5d7 Mon Sep 17 00:00:00 2001 From: florian Date: Sat, 7 Dec 2024 22:23:17 +0100 Subject: [PATCH] + zen5 architecture for completeness --- compiler/i386/cpuinfo.pas | 12 ++++++++---- compiler/x86/agx86nsm.pas | 6 ++++-- compiler/x86_64/cpuinfo.pas | 10 +++++++--- 3 files changed, 19 insertions(+), 9 deletions(-) diff --git a/compiler/i386/cpuinfo.pas b/compiler/i386/cpuinfo.pas index b0ddcbe879..54f1fe689b 100644 --- a/compiler/i386/cpuinfo.pas +++ b/compiler/i386/cpuinfo.pas @@ -67,7 +67,8 @@ Type cpu_icelake_client, cpu_icelake_server, cpu_zen3, - cpu_zen4 + cpu_zen4, + cpu_zen5 ); tfputype = @@ -147,7 +148,8 @@ Const 'ICELAKE-CLIENT', 'ICELAKE-SERVER', 'ZEN3', - 'ZEN4' + 'ZEN4', + 'ZEN5' ); fputypestr : array[tfputype] of string[7] = ( @@ -261,7 +263,8 @@ type { cpu_icelake_client } [CPUX86_HAS_BSWAP,CPUX86_HAS_BTX,CPUX86_HAS_CMOV,CPUX86_HAS_SSEUNIT,CPUX86_HAS_SSE2,CPUX86_HAS_SSE4_1,CPUX86_HAS_POPCNT,CPUX86_HAS_BMI1,CPUX86_HAS_BMI2,CPUX86_HAS_LZCNT,CPUX86_HAS_MOVBE], { cpu_icelake_server } [CPUX86_HAS_BSWAP,CPUX86_HAS_BTX,CPUX86_HAS_CMOV,CPUX86_HAS_SSEUNIT,CPUX86_HAS_SSE2,CPUX86_HAS_SSE4_1,CPUX86_HAS_POPCNT,CPUX86_HAS_BMI1,CPUX86_HAS_BMI2,CPUX86_HAS_LZCNT,CPUX86_HAS_MOVBE], { cpu_zen3 } [CPUX86_HAS_BSWAP,CPUX86_HAS_BTX,CPUX86_HAS_CMOV,CPUX86_HAS_SSEUNIT,CPUX86_HAS_SSE2,CPUX86_HAS_SSE4_1,CPUX86_HAS_POPCNT,CPUX86_HAS_BMI1,CPUX86_HAS_BMI2,CPUX86_HAS_LZCNT,CPUX86_HAS_MOVBE], - { cpu_zen4 } [CPUX86_HAS_BSWAP,CPUX86_HAS_BTX,CPUX86_HAS_CMOV,CPUX86_HAS_SSEUNIT,CPUX86_HAS_SSE2,CPUX86_HAS_SSE4_1,CPUX86_HAS_POPCNT,CPUX86_HAS_BMI1,CPUX86_HAS_BMI2,CPUX86_HAS_LZCNT,CPUX86_HAS_MOVBE] + { cpu_zen4 } [CPUX86_HAS_BSWAP,CPUX86_HAS_BTX,CPUX86_HAS_CMOV,CPUX86_HAS_SSEUNIT,CPUX86_HAS_SSE2,CPUX86_HAS_SSE4_1,CPUX86_HAS_POPCNT,CPUX86_HAS_BMI1,CPUX86_HAS_BMI2,CPUX86_HAS_LZCNT,CPUX86_HAS_MOVBE], + { cpu_zen5 } [CPUX86_HAS_BSWAP,CPUX86_HAS_BTX,CPUX86_HAS_CMOV,CPUX86_HAS_SSEUNIT,CPUX86_HAS_SSE2,CPUX86_HAS_SSE4_1,CPUX86_HAS_POPCNT,CPUX86_HAS_BMI1,CPUX86_HAS_BMI2,CPUX86_HAS_LZCNT,CPUX86_HAS_MOVBE] ); fpu_capabilities : array[tfputype] of set of tfpuflags = ( @@ -302,7 +305,8 @@ type { cpu_icelake_client } [CPUX86_HINT_FAST_BT_REG_IMM,CPUX86_HINT_FAST_BTX_REG_IMM,CPUX86_HINT_FAST_BT_MEM_IMM,CPUX86_HINT_FAST_XCHG,CPUX86_HINT_FAST_PDEP_PEXT,CPUX86_HINT_FAST_3COMP_ADDR,CPUX86_HINT_FAST_SHORT_REP_MOVS], { cpu_icelake_server } [CPUX86_HINT_FAST_BT_REG_IMM,CPUX86_HINT_FAST_BTX_REG_IMM,CPUX86_HINT_FAST_BT_MEM_IMM,CPUX86_HINT_FAST_XCHG,CPUX86_HINT_FAST_PDEP_PEXT,CPUX86_HINT_FAST_3COMP_ADDR,CPUX86_HINT_FAST_SHORT_REP_MOVS], { cpu_zen3 } [CPUX86_HINT_FAST_BT_REG_IMM,CPUX86_HINT_FAST_BTX_REG_IMM,CPUX86_HINT_FAST_BT_MEM_IMM,CPUX86_HINT_FAST_XCHG,CPUX86_HINT_FAST_PDEP_PEXT,CPUX86_HINT_FAST_3COMP_ADDR,CPUX86_HINT_FAST_SHORT_REP_MOVS,CPUX86_HINT_BSX_DEST_UNCHANGED_ON_ZF_1], - { cpu_zen4 } [CPUX86_HINT_FAST_BT_REG_IMM,CPUX86_HINT_FAST_BTX_REG_IMM,CPUX86_HINT_FAST_BT_MEM_IMM,CPUX86_HINT_FAST_XCHG,CPUX86_HINT_FAST_PDEP_PEXT,CPUX86_HINT_FAST_3COMP_ADDR,CPUX86_HINT_FAST_SHORT_REP_MOVS,CPUX86_HINT_BSX_DEST_UNCHANGED_ON_ZF_1] + { cpu_zen4 } [CPUX86_HINT_FAST_BT_REG_IMM,CPUX86_HINT_FAST_BTX_REG_IMM,CPUX86_HINT_FAST_BT_MEM_IMM,CPUX86_HINT_FAST_XCHG,CPUX86_HINT_FAST_PDEP_PEXT,CPUX86_HINT_FAST_3COMP_ADDR,CPUX86_HINT_FAST_SHORT_REP_MOVS,CPUX86_HINT_BSX_DEST_UNCHANGED_ON_ZF_1], + { cpu_zen5 } [CPUX86_HINT_FAST_BT_REG_IMM,CPUX86_HINT_FAST_BTX_REG_IMM,CPUX86_HINT_FAST_BT_MEM_IMM,CPUX86_HINT_FAST_XCHG,CPUX86_HINT_FAST_PDEP_PEXT,CPUX86_HINT_FAST_3COMP_ADDR,CPUX86_HINT_FAST_SHORT_REP_MOVS,CPUX86_HINT_BSX_DEST_UNCHANGED_ON_ZF_1] ); Implementation diff --git a/compiler/x86/agx86nsm.pas b/compiler/x86/agx86nsm.pas index 86c3dc0536..f5d87f488a 100644 --- a/compiler/x86/agx86nsm.pas +++ b/compiler/x86/agx86nsm.pas @@ -127,7 +127,8 @@ interface 'ia64', // cpu_icelake_client 'ia64', // cpu_icelake_server 'ia64', // cpu_zen3 - 'ia64' // cpu_zen4 + 'ia64', // cpu_zen4 + 'ia64' // cpu_zen5 {$elseif defined(i386)} 'ia64', // cpu_none '386', // cpu_386 @@ -151,7 +152,8 @@ interface 'ia64', // cpu_icelake_client 'ia64', // cpu_icelake_server 'ia64', // cpu_zen3 - 'ia64' // cpu_zen4 + 'ia64', // cpu_zen4 + 'ia64' // cpu_zen5 {$elseif defined(i8086)} 'ia64', // cpu_none '8086', // cpu_8086 diff --git a/compiler/x86_64/cpuinfo.pas b/compiler/x86_64/cpuinfo.pas index 8bfae9995b..bf021f72af 100644 --- a/compiler/x86_64/cpuinfo.pas +++ b/compiler/x86_64/cpuinfo.pas @@ -65,7 +65,8 @@ Type cpu_icelake_client, cpu_icelake_server, cpu_zen3, - cpu_zen4 + cpu_zen4, + cpu_zen5 ); tfputype = @@ -154,6 +155,7 @@ Const 'ICELAKE-CLIENT', 'ICELAKE-SERVER', 'ZEN3', + 'ZEN4', 'ZEN4' ); @@ -293,7 +295,8 @@ type { cpu_icelake_client } cpu_x86_64_v4_flags, { cpu_icelake_server } cpu_x86_64_v4_flags, { cpu_zen3 } cpu_x86_64_v3_flags, - { cpu_zen4 } cpu_x86_64_v4_flags + { cpu_zen4 } cpu_x86_64_v4_flags, + { cpu_zen5 } cpu_x86_64_v4_flags ); fpu_x86_64_v1_flags = []; @@ -341,7 +344,8 @@ type { cpu_icelake_client } [CPUX86_HINT_FAST_BT_REG_IMM,CPUX86_HINT_FAST_BTX_REG_IMM,CPUX86_HINT_FAST_BT_MEM_IMM,CPUX86_HINT_FAST_XCHG,CPUX86_HINT_FAST_PDEP_PEXT,CPUX86_HINT_FAST_3COMP_ADDR,CPUX86_HINT_FAST_SHORT_REP_MOVS], { cpu_icelake_server } [CPUX86_HINT_FAST_BT_REG_IMM,CPUX86_HINT_FAST_BTX_REG_IMM,CPUX86_HINT_FAST_BT_MEM_IMM,CPUX86_HINT_FAST_XCHG,CPUX86_HINT_FAST_PDEP_PEXT,CPUX86_HINT_FAST_3COMP_ADDR,CPUX86_HINT_FAST_SHORT_REP_MOVS], { cpu_zen3 } [CPUX86_HINT_FAST_BT_REG_IMM,CPUX86_HINT_FAST_BTX_REG_IMM,CPUX86_HINT_FAST_BT_MEM_IMM,CPUX86_HINT_FAST_XCHG,CPUX86_HINT_FAST_PDEP_PEXT,CPUX86_HINT_FAST_3COMP_ADDR,CPUX86_HINT_FAST_SHORT_REP_MOVS,CPUX86_HINT_BSX_DEST_UNCHANGED_ON_ZF_1], - { cpu_zen4 } [CPUX86_HINT_FAST_BT_REG_IMM,CPUX86_HINT_FAST_BTX_REG_IMM,CPUX86_HINT_FAST_BT_MEM_IMM,CPUX86_HINT_FAST_XCHG,CPUX86_HINT_FAST_PDEP_PEXT,CPUX86_HINT_FAST_3COMP_ADDR,CPUX86_HINT_FAST_SHORT_REP_MOVS,CPUX86_HINT_BSX_DEST_UNCHANGED_ON_ZF_1] + { cpu_zen4 } [CPUX86_HINT_FAST_BT_REG_IMM,CPUX86_HINT_FAST_BTX_REG_IMM,CPUX86_HINT_FAST_BT_MEM_IMM,CPUX86_HINT_FAST_XCHG,CPUX86_HINT_FAST_PDEP_PEXT,CPUX86_HINT_FAST_3COMP_ADDR,CPUX86_HINT_FAST_SHORT_REP_MOVS,CPUX86_HINT_BSX_DEST_UNCHANGED_ON_ZF_1], + { cpu_zen5 } [CPUX86_HINT_FAST_BT_REG_IMM,CPUX86_HINT_FAST_BTX_REG_IMM,CPUX86_HINT_FAST_BT_MEM_IMM,CPUX86_HINT_FAST_XCHG,CPUX86_HINT_FAST_PDEP_PEXT,CPUX86_HINT_FAST_3COMP_ADDR,CPUX86_HINT_FAST_SHORT_REP_MOVS,CPUX86_HINT_BSX_DEST_UNCHANGED_ON_ZF_1] ); Implementation