- reverted workaround from r15939 that hasn't been necessary since FPC 2.6.0,

since that version already shiped with GNU AS 2.21 (mantis #17337)

git-svn-id: trunk@31196 -
This commit is contained in:
Jonas Maebe 2015-07-06 08:05:37 +00:00
parent ba1297b1ab
commit 5d15a28e75

View File

@ -285,11 +285,7 @@ interface
procedure Tx86InstrWriter.WriteInstruction(hp: tai);
var
op : tasmop;
{$ifdef x86_64}
val : aint;
{$endif}
calljmp : boolean;
need_second_mov : boolean;
i : integer;
sreg : string;
begin
@ -298,11 +294,6 @@ interface
taicpu(hp).SetOperandOrder(op_att);
op:=taicpu(hp).opcode;
calljmp:=is_calljmp(op);
{ constant values in the 32 bit range are sign-extended to
64 bits, but this is not what we want. PM 2010-09-02
the fix consists of simply setting only the 4-byte register
as the upper 4-bytes will be zeroed at the same time. }
need_second_mov:=false;
// BUGFIX GAS-assembler
// Intel "Intel 64 and IA-32 Architectures Software Developers manual 12/2011
@ -325,26 +316,6 @@ interface
taicpu(hp).oper[0]^.reg := gas_regnum_search('%x' + copy(sreg, 3, length(sreg) - 2));
end;
end;
{$ifdef x86_64}
if (op=A_MOV) and (taicpu(hp).opsize=S_Q) and
(taicpu(hp).oper[0]^.typ = top_const) then
begin
val := taicpu(hp).oper[0]^.val;
if (val > int64($7fffffff)) and (val < int64($100000000)) then
begin
owner.AsmWrite(target_asm.comment);
owner.AsmWritePChar('Fix for Win64-GAS bug');
owner.AsmLn;
taicpu(hp).opsize:=S_L;
if taicpu(hp).oper[1]^.typ = top_reg then
setsubreg(taicpu(hp).oper[1]^.reg,R_SUBD)
else if taicpu(hp).oper[1]^.typ = top_ref then
need_second_mov:=true
else
internalerror(20100902);
end;
end;
{$endif x86_64}
{ see fNoInterUnitMovQ declaration comment }
if fNoInterUnitMovQ then
begin
@ -447,12 +418,6 @@ interface
end;
end;
owner.AsmLn;
if need_second_mov then
begin
taicpu(hp).oper[0]^.val:=0;
inc(taicpu(hp).oper[1]^.ref^.offset,4);
WriteInstruction(hp);
end;
end;