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* fixed <instr> reg,reg with regs>=r8
* fixed section naming * fixed relocations git-svn-id: trunk@3041 -
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florian
parent
c6d929a5ab
commit
5d243f665a
@ -42,7 +42,11 @@ interface
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TExeSection = class;
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TExeSymbol = class;
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TObjRelocationType = (RELOC_ABSOLUTE,RELOC_RELATIVE,RELOC_RVA);
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TObjRelocationType = (RELOC_ABSOLUTE,RELOC_RELATIVE,RELOC_RVA
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{$ifdef x86_64}
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,RELOC_ABSOLUTE32
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{$endif x86_64}
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);
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TObjSectionOption = (
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{ Has data available in the file }
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@ -353,6 +357,11 @@ interface
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end;
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TExeOutputClass=class of TExeOutput;
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{$ifdef i386}
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const
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RELOC_ABSOLUTE32 = RELOC_ABSOLUTE;
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{$endif i386}
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var
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exeoutput : TExeOutput;
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@ -725,7 +725,7 @@ implementation
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{$ifdef i386}
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s.relocsect:=TElfObjSection.create_ext('.rel'+s.name,SHT_REL,0,symtabsect.secshidx,s.secshidx,4,sizeof(TElfReloc));
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{$else i386}
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s.relocsect:=TElfObjSection.create_ext('.rel'+s.name,SHT_RELA,0,symtabsect.secshidx,s.secshidx,4,sizeof(TElfReloc));
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s.relocsect:=TElfObjSection.create_ext('.rela'+s.name,SHT_RELA,0,symtabsect.secshidx,s.secshidx,4,sizeof(TElfReloc));
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{$endif i386}
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{ add the relocations }
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r:=TObjRelocation(s.relocations.first);
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@ -779,8 +779,16 @@ implementation
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{ length of the relocated location is handled here }
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rel.addend:=qword(-4);
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end;
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RELOC_ABSOLUTE :
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reltyp:=R_X86_64_64;
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RELOC_ABSOLUTE :
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begin
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reltyp:=R_X86_64_64;
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rel.addend:=0;
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end;
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RELOC_ABSOLUTE32 :
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begin
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reltyp:=R_X86_64_32S;
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rel.addend:=0;
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end;
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else
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internalerror(200602261);
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end;
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@ -1428,7 +1428,7 @@ implementation
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(getsupreg(input.reg)>=RS_XMM8)) then
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begin
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output.rex_present:=true;
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output.rex:=output.rex or $44;
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output.rex:=output.rex or $41;
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inc(output.size,1);
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end;
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@ -1850,6 +1850,7 @@ implementation
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begin
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if rex=0 then
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inc(len);
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rex:=rex or $44;
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end;
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end;
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@ -2124,16 +2125,16 @@ implementation
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else
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begin
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if assigned(currsym) then
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objdata.writereloc(currval,4,currsym,RELOC_ABSOLUTE)
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objdata.writereloc(currval,4,currsym,RELOC_ABSOLUTE32)
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else
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objdata.writebytes(currval,4);
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objdata.writebytes(currval,4);
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end
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end;
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32,33,34 :
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begin
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getvalsym(c-32);
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if assigned(currsym) then
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objdata.writereloc(currval,4,currsym,RELOC_ABSOLUTE)
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objdata.writereloc(currval,4,currsym,RELOC_ABSOLUTE32)
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else
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objdata.writebytes(currval,4);
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end;
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@ -2153,7 +2154,7 @@ implementation
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if assigned(currsym) then
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objdata.writereloc(currval,4,currsym,RELOC_RELATIVE)
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else
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objdata.writereloc(currval-insend,4,nil,RELOC_ABSOLUTE)
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objdata.writereloc(currval-insend,4,nil,RELOC_ABSOLUTE32)
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end;
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56,57,58 :
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begin
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@ -2161,7 +2162,7 @@ implementation
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if assigned(currsym) then
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objdata.writereloc(currval,4,currsym,RELOC_RELATIVE)
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else
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objdata.writereloc(currval-insend,4,nil,RELOC_ABSOLUTE)
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objdata.writereloc(currval-insend,4,nil,RELOC_ABSOLUTE32)
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end;
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192,193,194 :
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begin
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@ -2284,7 +2285,7 @@ implementation
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if (oper[opidx]^.ot and OT_MEMORY)=OT_MEMORY then
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begin
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currsym:=objdata.symbolref(oper[opidx]^.ref^.symbol);
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objdata.writereloc(oper[opidx]^.ref^.offset,1,currsym,RELOC_ABSOLUTE)
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objdata.writereloc(oper[opidx]^.ref^.offset,1,currsym,RELOC_ABSOLUTE);
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end
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else
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begin
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@ -2296,7 +2297,7 @@ implementation
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2,4 :
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begin
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objdata.writereloc(oper[opidx]^.ref^.offset,ea_data.bytes,
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objdata.symbolref(oper[opidx]^.ref^.symbol),RELOC_ABSOLUTE);
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objdata.symbolref(oper[opidx]^.ref^.symbol),RELOC_ABSOLUTE32);
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inc(s,ea_data.bytes);
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end;
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end;
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@ -47,34 +47,34 @@ NR_R8,$01050008,r8,%r8,r8,r8,-1,-1,8,OT_REG64,0,64
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NR_R8L,$01010008,r8b,%r8b,r8b,r8b,-1,-1,8,OT_REG8,0,64
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NR_R8W,$01030008,r8w,%r8w,r8w,r8w,-1,-1,8,OT_REG16,0,64
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NR_R8D,$01040008,r8d,%r8d,r8d,r8d,-1,-1,8,OT_REG32,0,64
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NR_R9,$01050009,r9,%r9,r9,r9,-1,-1,9,OT_REG64,0,64
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NR_R9L,$01010009,r9b,%r9b,r9b,r9b,-1,-1,9,OT_REG8,0,64
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NR_R9W,$01030009,r9w,%r9w,r9w,r9w,-1,-1,9,OT_REG16,0,64
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NR_R9D,$01040009,r9d,%r9d,r9d,r9d,-1,-1,9,OT_REG32,0,64
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NR_R10,$0105000a,r10,%r10,r10,r10,-1,-1,10,OT_REG64,0,64
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NR_R10L,$0101000a,r10b,%r10b,r10b,r10b,-1,-1,10,OT_REG8,0,64
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NR_R10W,$0103000a,r10w,%r10w,r10w,r10w,-1,-1,10,OT_REG16,0,64
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NR_R10D,$0104000a,r10d,%r10d,r10d,r10d,-1,-1,10,OT_REG32,0,64
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NR_R11,$0105000b,r11,%r11,r11,r11,-1,-1,11,OT_REG64,0,64
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NR_R11L,$0101000b,r11b,%r11b,r11b,r11b,-1,-1,11,OT_REG8,0,64
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NR_R11W,$0103000b,r11w,%r11w,r11w,r11w,-1,-1,11,OT_REG16,0,64
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NR_R11D,$0104000b,r11d,%r11d,r11d,r11d,-1,-1,11,OT_REG32,0,64
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NR_R12,$0105000c,r12,%r12,r12,r12,-1,-1,12,OT_REG64,0,64
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NR_R12L,$0101000c,r12b,%r12b,r12b,r12b,-1,-1,12,OT_REG8,0,64
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NR_R12W,$0103000c,r12w,%r12w,r12w,r12w,-1,-1,12,OT_REG16,0,64
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NR_R12D,$0104000c,r12d,%r12d,r12d,r12d,-1,-1,12,OT_REG32,0,64
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NR_R13,$0105000d,r13,%r13,r13,r13,-1,-1,13,OT_REG64,0,64
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NR_R13L,$0101000d,r13b,%r13b,r13b,r13b,-1,-1,13,OT_REG8,0,64
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NR_R13W,$0103000d,r13w,%r13w,r13w,r13w,-1,-1,13,OT_REG16,0,64
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NR_R13D,$0104000d,r13d,%r13d,r13d,r13d,-1,-1,13,OT_REG32,0,64
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NR_R14,$0105000e,r14,%r14,r14,r14,-1,-1,14,OT_REG64,0,64
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NR_R14L,$0101000e,r14b,%r14b,r14b,r14b,-1,-1,14,OT_REG8,0,64
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NR_R14W,$0103000e,r14w,%r14w,r14w,r14w,-1,-1,14,OT_REG16,0,64
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NR_R14D,$0104000e,r14d,%r14d,r14d,r14d,-1,-1,14,OT_REG32,0,64
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NR_R15,$0105000f,r15,%r15,r15,r15,-1,-1,15,OT_REG64,0,64
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NR_R15L,$0101000f,r15b,%r15b,r15b,r15b,-1,-1,15,OT_REG8,0,64
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NR_R15W,$0103000f,r15w,%r15w,r15w,r15w,-1,-1,15,OT_REG16,0,64
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NR_R15D,$0104000f,r15d,%r15d,r15d,r15d,-1,-1,15,OT_REG32,0,64
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NR_R9,$01050009,r9,%r9,r9,r9,-1,-1,9,OT_REG64,1,64
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NR_R9L,$01010009,r9b,%r9b,r9b,r9b,-1,-1,9,OT_REG8,1,64
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NR_R9W,$01030009,r9w,%r9w,r9w,r9w,-1,-1,9,OT_REG16,1,64
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NR_R9D,$01040009,r9d,%r9d,r9d,r9d,-1,-1,9,OT_REG32,1,64
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NR_R10,$0105000a,r10,%r10,r10,r10,-1,-1,10,OT_REG64,2,64
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NR_R10L,$0101000a,r10b,%r10b,r10b,r10b,-1,-1,10,OT_REG8,2,64
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NR_R10W,$0103000a,r10w,%r10w,r10w,r10w,-1,-1,10,OT_REG16,2,64
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NR_R10D,$0104000a,r10d,%r10d,r10d,r10d,-1,-1,10,OT_REG32,2,64
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NR_R11,$0105000b,r11,%r11,r11,r11,-1,-1,11,OT_REG64,3,64
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NR_R11L,$0101000b,r11b,%r11b,r11b,r11b,-1,-1,11,OT_REG8,3,64
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NR_R11W,$0103000b,r11w,%r11w,r11w,r11w,-1,-1,11,OT_REG16,3,64
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NR_R11D,$0104000b,r11d,%r11d,r11d,r11d,-1,-1,11,OT_REG32,3,64
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NR_R12,$0105000c,r12,%r12,r12,r12,-1,-1,12,OT_REG64,4,64
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NR_R12L,$0101000c,r12b,%r12b,r12b,r12b,-1,-1,12,OT_REG8,4,64
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NR_R12W,$0103000c,r12w,%r12w,r12w,r12w,-1,-1,12,OT_REG16,4,64
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NR_R12D,$0104000c,r12d,%r12d,r12d,r12d,-1,-1,12,OT_REG32,4,64
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NR_R13,$0105000d,r13,%r13,r13,r13,-1,-1,13,OT_REG64,5,64
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NR_R13L,$0101000d,r13b,%r13b,r13b,r13b,-1,-1,13,OT_REG8,5,64
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NR_R13W,$0103000d,r13w,%r13w,r13w,r13w,-1,-1,13,OT_REG16,5,64
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NR_R13D,$0104000d,r13d,%r13d,r13d,r13d,-1,-1,13,OT_REG32,5,64
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NR_R14,$0105000e,r14,%r14,r14,r14,-1,-1,14,OT_REG64,6,64
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NR_R14L,$0101000e,r14b,%r14b,r14b,r14b,-1,-1,14,OT_REG8,6,64
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NR_R14W,$0103000e,r14w,%r14w,r14w,r14w,-1,-1,14,OT_REG16,6,64
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NR_R14D,$0104000e,r14d,%r14d,r14d,r14d,-1,-1,14,OT_REG32,6,64
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NR_R15,$0105000f,r15,%r15,r15,r15,-1,-1,15,OT_REG64,7,64
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NR_R15L,$0101000f,r15b,%r15b,r15b,r15b,-1,-1,15,OT_REG8,7,64
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NR_R15W,$0103000f,r15w,%r15w,r15w,r15w,-1,-1,15,OT_REG16,7,64
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NR_R15D,$0104000f,r15d,%r15d,r15d,r15d,-1,-1,15,OT_REG32,7,64
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; EIP is needed for DWARF call frame info return address (RA)
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NR_RIP,$05000000,rip,%rip,rip,rip,-1,8,16,OT_NONE,0,64
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@ -40,34 +40,34 @@
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0,
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1,
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