From 5e133344677f0b981bc5832a389505f1370961ec Mon Sep 17 00:00:00 2001 From: sergei Date: Mon, 28 Jan 2013 21:32:21 +0000 Subject: [PATCH] * Fixed tMIPSELtypeconvnode.second_int_to_bool handling of C booleans, webtbs/tw10233 and webtbs/tw17180 now work. * Reused applicable code from the above mentioned method in tMIPSELnotnode.second_boolean, it is more efficient in handling 64-bit data. git-svn-id: trunk@23531 - --- compiler/mips/ncpucnv.pas | 10 +++++----- compiler/mips/ncpumat.pas | 16 ++++++++-------- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/compiler/mips/ncpucnv.pas b/compiler/mips/ncpucnv.pas index 4cd73667c8..3f9952fe4a 100644 --- a/compiler/mips/ncpucnv.pas +++ b/compiler/mips/ncpucnv.pas @@ -282,7 +282,7 @@ begin cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.register,hreg2); end; hreg1 := cg.getintregister(current_asmdata.CurrAsmList, opsize); - current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SNE, hreg1, hreg2, NR_R0)); + current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SLTU, hreg1, NR_R0, hreg2)); end; LOC_JUMP: begin @@ -298,6 +298,10 @@ begin else internalerror(10062); end; + { Now hreg1 is either 0 or 1. For C booleans it must be 0 or -1. } + if is_cbool(resultdef) then + cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_SINT,hreg1,hreg1); + {$ifndef cpu64bitalu} if (location.size in [OS_64,OS_S64]) then begin @@ -314,10 +318,6 @@ begin {$endif not cpu64bitalu} location.Register := hreg1; -{zfx - if location.size in [OS_64, OS_S64] then - internalerror(200408241); -} current_procinfo.CurrTrueLabel := oldtruelabel; current_procinfo.CurrFalseLabel := oldfalselabel; diff --git a/compiler/mips/ncpumat.pas b/compiler/mips/ncpumat.pas index 77e350806b..a458a3c483 100644 --- a/compiler/mips/ncpumat.pas +++ b/compiler/mips/ncpumat.pas @@ -282,10 +282,6 @@ begin begin secondpass(left); case left.location.loc of - LOC_FLAGS: - begin - internalerror(2007011501); - end; LOC_REGISTER, LOC_CREGISTER, LOC_REFERENCE, LOC_CREFERENCE: begin hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location, left.resultdef, left.resultdef, True); @@ -297,9 +293,13 @@ begin current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_OR,r64.reglo,left.location.register64.reglo,left.location.register64.reghi)); { x=0 <=> unsigned(x)<1 } current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_const(A_SLTIU,r64.reglo,r64.reglo,1)); - cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,0,r64.reghi); - if not is_pasbool(resultdef) then - cg64.a_op64_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_S64,r64,r64); + if is_cbool(resultdef) then + begin + cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_S32,r64.reglo,r64.reglo); + cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,r64.reglo,r64.reghi); + end + else + cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,r64.reghi); location_reset(location,LOC_REGISTER,OS_64); location.Register64:=r64; end @@ -308,7 +308,7 @@ begin tmpreg := cg.GetIntRegister(current_asmdata.CurrAsmList, OS_INT); { x=0 <=> unsigned(x)<1 } current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_const(A_SLTIU, tmpreg, left.location.Register, 1)); - if not is_pasbool(resultdef) then + if is_cbool(resultdef) then cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,OS_S32,tmpreg,tmpreg); location_reset(location, LOC_REGISTER, OS_INT); location.Register := tmpreg;