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+ SPARC64 cpugas unit
+ support for %gdop_hix22/%gdop_lox22 git-svn-id: trunk@36475 -
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florian
parent
c7539f4252
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5e969d90cb
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vendored
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vendored
@ -675,6 +675,7 @@ compiler/sparc/rspstab.inc svneol=native#text/plain
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compiler/sparc/rspstd.inc svneol=native#text/plain
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compiler/sparc/rspsup.inc svneol=native#text/plain
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compiler/sparc64/cgcpu.pas svneol=native#text/pascal
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compiler/sparc64/cpugas.pas svneol=native#text/pascal
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compiler/sparc64/cpuinfo.pas svneol=native#text/plain
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compiler/sparc64/cpunode.pas svneol=native#text/plain
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compiler/sparc64/cpupara.pas svneol=native#text/plain
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@ -110,6 +110,10 @@ interface
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,addr_gotpage
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,addr_gotpageoffset
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{$ENDIF AARCH64}
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{$ifdef SPARC64}
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,addr_gdop_hix22
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,addr_gdop_lox22
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{$endif SPARC64}
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);
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261
compiler/sparc64/cpugas.pas
Normal file
261
compiler/sparc64/cpugas.pas
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@ -0,0 +1,261 @@
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{
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Copyright (c) 1999-2003 by Florian Klaempfl
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This unit implements an asmoutput class for SPARC AT&T syntax
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit cpugas;
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{$i fpcdefs.inc}
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interface
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uses
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cpubase,systems,
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aasmtai,aasmdata,aasmcpu,assemble,aggas,
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cgutils,globtype;
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type
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TGasSPARC=class(TGnuAssembler)
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constructor CreateWithWriter(info: pasminfo; wr: TExternalAssemblerOutputFile; freewriter, smart: boolean); override;
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{# Constructs the command line for calling the assembler }
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function MakeCmdLine: TCmdStr; override;
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end;
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TSPARCInstrWriter=class(TCPUInstrWriter)
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procedure WriteInstruction(hp:Tai);override;
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function GetReferenceString(var ref : TReference):string;
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function getopstr(const Oper:TOper):string;
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end;
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implementation
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uses
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cutils,globals,cpuinfo,procinfo,
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verbose,itcpugas,cgbase;
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{****************************************************************************}
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{ GNU PPC Assembler writer }
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{****************************************************************************}
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constructor TGasSPARC.CreateWithWriter(info: pasminfo; wr: TExternalAssemblerOutputFile; freewriter, smart: boolean);
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begin
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inherited;
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InstrWriter := TSPARCInstrWriter.create(self);
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end;
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function TGasSPARC.MakeCmdLine: TCmdStr;
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begin
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result := Inherited MakeCmdLine;
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{ ARCH selection }
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// Note for casual readers: gas (GNU as) uses -Av7, -Av8, -Av9 etc. on SPARC,
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// rather than variants of the -m option used by most other CPUs. Solaris as
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// uses -xarch=v7, -xarch=v8 etc., that form is not supported here since there
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// are probably other incompatibilties between the GNU and Solaris binutils
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// that need to be reviewed.
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//
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// v9 is required as the default since the RTL started using membar at 2.2.2.
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case current_settings.cputype of
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{$ifdef SPARC}
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cpu_SPARC_V7: Replace(result,'$ARCH','-Av7');
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cpu_SPARC_V8: Replace(result,'$ARCH','-Av8');
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{$endif SPARC}
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cpu_SPARC_V9: Replace(result,'$ARCH','-Av9');
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else
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Replace(result,'$ARCH','-Av9')
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end
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end;
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function TSPARCInstrWriter.GetReferenceString(var ref:TReference):string;
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begin
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result:='';
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if assigned(ref.symbol) then
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begin
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result:=ref.symbol.name;
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if assigned(ref.relsymbol) then
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result:=result+'-'+ref.relsymbol.name;
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end;
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if (ref.offset<0) then
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result:=result+tostr(ref.offset)
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else if (ref.offset>0) then
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begin
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if assigned(ref.symbol) then
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result:=result+'+';
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result:=result+tostr(ref.offset);
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end
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{ asmreader appears to treat literal numbers as references }
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else if (ref.symbol=nil) and (ref.base=NR_NO) and (ref.index=NR_NO) then
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result:='0';
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case ref.refaddr of
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addr_high:
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result:='%hi('+result+')';
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addr_low:
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result:='%lo('+result+')';
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addr_gdop_hix22:
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result:='%gdop_hix2('+result+')';
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addr_gdop_lox22:
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result:='%gdop_lox2('+result+')';
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end;
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if assigned(ref.symbol) or (ref.offset<>0) then
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begin
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if (ref.base<>NR_NO) then
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begin
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if (ref.index<>NR_NO) then
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InternalError(2013013001);
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if (result[1]='-') then
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result:=gas_regname(ref.base)+result
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else
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result:=gas_regname(ref.base)+'+'+result;
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end
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else if (ref.index<>NR_NO) then
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InternalError(2013122501);
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end
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else
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begin
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if (ref.base<>NR_NO) then
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begin
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result:=gas_regname(ref.base);
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if (ref.index<>NR_NO) then
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result:=result+'+'+gas_regname(ref.index);
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end
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else if (ref.index<>NR_NO) then
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result:=gas_regname(ref.index);
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end;
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end;
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function TSPARCInstrWriter.getopstr(const Oper:TOper):string;
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begin
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with Oper do
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case typ of
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top_reg:
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getopstr:=gas_regname(reg);
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top_const:
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getopstr:=tostr(longint(val));
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top_ref:
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if (oper.ref^.refaddr in [addr_no,addr_pic]) or
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((oper.ref^.refaddr=addr_low) and ((oper.ref^.base<>NR_NO) or
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(oper.ref^.index<>NR_NO))) then
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getopstr:='['+getreferencestring(ref^)+']'
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else
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getopstr:=getreferencestring(ref^);
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else
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internalerror(10001);
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end;
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end;
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procedure TSPARCInstrWriter.WriteInstruction(hp:Tai);
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procedure writePseudoInstruction(opc: TAsmOp);
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begin
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if (taicpu(hp).ops<>2) or
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(taicpu(hp).oper[0]^.typ<>top_reg) or
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(taicpu(hp).oper[1]^.typ<>top_reg) then
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internalerror(200401045);
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{ Fxxxs %f<even>,%f<even> }
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owner.writer.AsmWriteln(#9+std_op2str[opc]+#9+getopstr(taicpu(hp).oper[0]^)+','+getopstr(taicpu(hp).oper[1]^));
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{ FMOVs %f<odd>,%f<odd> }
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inc(taicpu(hp).oper[0]^.reg);
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inc(taicpu(hp).oper[1]^.reg);
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owner.writer.AsmWriteln(#9+std_op2str[A_FMOVs]+#9+getopstr(taicpu(hp).oper[0]^)+','+getopstr(taicpu(hp).oper[1]^));
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dec(taicpu(hp).oper[0]^.reg);
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dec(taicpu(hp).oper[1]^.reg);
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end;
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var
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Op:TAsmOp;
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s:String;
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i:Integer;
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begin
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if hp.typ<>ait_instruction then
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exit;
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op:=taicpu(hp).opcode;
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if (op=A_Bxx) and (taicpu(hp).condition in floatAsmConds) then
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op:=A_FBxx;
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{ translate pseudoops, this should be move to a separate pass later, so it's done before
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peephole optimization }
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case op of
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A_FABSd:
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writePseudoInstruction(A_FABSs);
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A_FMOVd:
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writePseudoInstruction(A_FMOVs);
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A_FNEGd:
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writePseudoInstruction(A_FNEGs);
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else
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begin
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{ call maybe not translated to call }
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s:=#9+std_op2str[op]+cond2str[taicpu(hp).condition];
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if taicpu(hp).delayslot_annulled then
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s:=s+',a';
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if taicpu(hp).ops>0 then
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begin
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s:=s+#9+getopstr(taicpu(hp).oper[0]^);
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for i:=1 to taicpu(hp).ops-1 do
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s:=s+','+getopstr(taicpu(hp).oper[i]^);
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end;
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owner.writer.AsmWriteLn(s);
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end;
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end;
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end;
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const
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as_sparc_as_info : tasminfo =
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(
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id : as_gas;
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idtxt : 'AS';
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asmbin : 'as';
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{$ifdef FPC_SPARC_V8_ONLY}
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asmcmd : '$PIC -o $OBJ $EXTRAOPT $ASM';
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{$else}
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asmcmd : '$ARCH $PIC -o $OBJ $EXTRAOPT $ASM';
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{$endif}
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supported_targets : [system_sparc64_linux];
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flags : [af_needar,af_smartlink_sections];
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labelprefix : '.L';
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comment : '# ';
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dollarsign: '$';
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);
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as_sparc_gas_info : tasminfo =
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(
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id : as_ggas;
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idtxt : 'GAS';
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asmbin : 'gas';
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asmcmd : '$ARCH $PIC -o $OBJ $EXTRAOPT $ASM';
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supported_targets : [system_sparc64_linux];
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flags : [af_needar,af_smartlink_sections];
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labelprefix : '.L';
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comment : '# ';
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dollarsign: '$';
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);
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begin
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RegisterAssembler(as_SPARC_as_info,TGasSPARC);
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RegisterAssembler(as_SPARC_gas_info,TGasSPARC);
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end.
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@ -155,10 +155,16 @@ Interface
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if is_register(actasmpattern) then
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exit;
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actrel:=addr_no;
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if (actasmpattern='%HI') then
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if actasmpattern='%HI' then
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actrel:=addr_high
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else if (actasmpattern='%LO')then
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else if actasmpattern='%LO' then
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actrel:=addr_low
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{$ifdef SPARC64}
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else if actasmpattern='%GDOP_HIX2' then
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actrel:=addr_gdop_hix22
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else if actasmpattern='%GDOP_LOX2' then
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actrel:=addr_gdop_lox22
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{$endif SPARC64}
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else
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Message(asmr_e_invalid_register);
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if (actrel<>addr_no) then
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