diff --git a/compiler/arm/rgcpu.pas b/compiler/arm/rgcpu.pas index 87d900699b..83085207e0 100644 --- a/compiler/arm/rgcpu.pas +++ b/compiler/arm/rgcpu.pas @@ -41,8 +41,8 @@ unit rgcpu; private procedure spilling_create_load_store(list: TAsmList; pos: tai; const spilltemp:treference;tempreg:tregister; is_store: boolean); public - procedure do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override; - procedure do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override; + procedure do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override; + procedure do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override; procedure add_constraints(reg:tregister);override; function get_spill_subreg(r:tregister) : tsubregister;override; end; @@ -51,8 +51,8 @@ unit rgcpu; private procedure SplitITBlock(list:TAsmList;pos:tai); public - procedure do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override; - procedure do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override; + procedure do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override; + procedure do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override; end; trgintcputhumb2 = class(trgcputhumb2) @@ -247,7 +247,7 @@ unit rgcpu; end; - procedure trgcpu.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister); + procedure trgcpu.do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); begin { don't load spilled register between mov lr,pc @@ -266,16 +266,16 @@ unit rgcpu; if fix_spilling_offset(spilltemp.offset) then spilling_create_load_store(list, pos, spilltemp, tempreg, false) else - inherited do_spill_read(list,pos,spilltemp,tempreg); + inherited; end; - procedure trgcpu.do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister); + procedure trgcpu.do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); begin if fix_spilling_offset(spilltemp.offset) then spilling_create_load_store(list, pos, spilltemp, tempreg, true) else - inherited do_spill_written(list,pos,spilltemp,tempreg); + inherited; end; @@ -368,7 +368,7 @@ unit rgcpu; list.InsertAfter(taicpu.op_cond(remOp,taicpu(hp).oper[0]^.cc), pos); end; - procedure trgcputhumb2.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister); + procedure trgcputhumb2.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister;orgsupreg:tsuperregister); var tmpref : treference; helplist : TAsmList; @@ -436,11 +436,11 @@ unit rgcpu; helplist.free; end else - inherited do_spill_read(list,pos,spilltemp,tempreg); + inherited; end; - procedure trgcputhumb2.do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister); + procedure trgcputhumb2.do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister;orgsupreg:tsuperregister); var tmpref : treference; helplist : TAsmList; @@ -494,7 +494,7 @@ unit rgcpu; helplist.free; end else - inherited do_spill_written(list,pos,spilltemp,tempreg); + inherited; end; diff --git a/compiler/avr/rgcpu.pas b/compiler/avr/rgcpu.pas index 602ec1c2ff..66cdc1e6ba 100644 --- a/compiler/avr/rgcpu.pas +++ b/compiler/avr/rgcpu.pas @@ -36,8 +36,8 @@ unit rgcpu; type trgcpu = class(trgobj) procedure add_constraints(reg:tregister);override; - procedure do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override; - procedure do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override; + procedure do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override; + procedure do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override; end; trgintcpu = class(trgcpu) @@ -87,7 +87,7 @@ unit rgcpu; end; - procedure trgcpu.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister); + procedure trgcpu.do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); var helpins : tai; tmpref : treference; @@ -110,11 +110,11 @@ unit rgcpu; helplist.free; end else - inherited do_spill_read(list,pos,spilltemp,tempreg); + inherited; end; - procedure trgcpu.do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister); + procedure trgcpu.do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); var tmpref : treference; helplist : TAsmList; @@ -135,7 +135,7 @@ unit rgcpu; helplist.free; end else - inherited do_spill_written(list,pos,spilltemp,tempreg); + inherited; end; diff --git a/compiler/mips/rgcpu.pas b/compiler/mips/rgcpu.pas index 73e1c7d834..1e3c4e94c0 100644 --- a/compiler/mips/rgcpu.pas +++ b/compiler/mips/rgcpu.pas @@ -27,7 +27,7 @@ unit rgcpu; interface uses - aasmbase,aasmcpu,aasmtai,aasmdata, + aasmbase,aasmsym,aasmcpu,aasmtai,aasmdata, cgbase,cgutils, cpubase, rgobj; @@ -36,9 +36,9 @@ unit rgcpu; trgcpu=class(trgobj) procedure add_constraints(reg:tregister);override; function get_spill_subreg(r : tregister) : tsubregister;override; - procedure do_spill_read(list:tasmlist;pos:tai;const spilltemp:treference;tempreg:tregister);override; - procedure do_spill_written(list:tasmlist;pos:tai;const spilltemp:treference;tempreg:tregister);override; - function do_spill_replace(list:TAsmList;instr:taicpu;orgreg:tsuperregister;const spilltemp:treference):boolean;override; + procedure do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override; + procedure do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override; + function do_spill_replace(list: TAsmList; instr: tai_cpu_abstract_sym; orgreg: tsuperregister; const spilltemp: treference): boolean; override; end; trgintcpu=class(trgcpu) @@ -92,7 +92,7 @@ implementation end; - procedure trgcpu.do_spill_read(list:tasmlist;pos:tai;const spilltemp:treference;tempreg:tregister); + procedure trgcpu.do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); var helpins : tai; tmpref : treference; @@ -120,11 +120,11 @@ implementation helplist.free; end else - inherited do_spill_read(list,pos,spilltemp,tempreg); + inherited; end; - procedure trgcpu.do_spill_written(list:tasmlist;pos:tai;const spilltemp:treference;tempreg:tregister); + procedure trgcpu.do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); var tmpref : treference; helplist : tasmlist; @@ -153,11 +153,11 @@ implementation helplist.free; end else - inherited do_spill_written(list,pos,spilltemp,tempreg); + inherited; end; - function trgcpu.do_spill_replace(list:TAsmList;instr:taicpu;orgreg:tsuperregister;const spilltemp:treference):boolean; + function trgcpu.do_spill_replace(list: TAsmList; instr: tai_cpu_abstract_sym; orgreg: tsuperregister; const spilltemp: treference): boolean; begin result:=false; { Replace 'move orgreg,src' with 'sw src,spilltemp' diff --git a/compiler/ppcgen/rgcpu.pas b/compiler/ppcgen/rgcpu.pas index 64b84bdd82..8570e39c66 100644 --- a/compiler/ppcgen/rgcpu.pas +++ b/compiler/ppcgen/rgcpu.pas @@ -35,8 +35,8 @@ unit rgcpu; type trgcpu = class(trgobj) - procedure do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override; - procedure do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override; + procedure do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override; + procedure do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override; end; trgintcpu = class(trgcpu) @@ -53,7 +53,7 @@ unit rgcpu; procinfo; - procedure trgcpu.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister); + procedure trgcpu.do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); var tmpref : treference; helplist : TAsmList; @@ -100,11 +100,11 @@ unit rgcpu; helplist.free; end else - inherited do_spill_read(list,pos,spilltemp,tempreg); + inherited; end; - procedure trgcpu.do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister); + procedure trgcpu.do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); var tmpref : treference; helplist : TAsmList; @@ -147,7 +147,7 @@ unit rgcpu; helplist.free; end else - inherited do_spill_written(list,pos,spilltemp,tempreg); + inherited; end; {$ifdef user0} diff --git a/compiler/rgobj.pas b/compiler/rgobj.pas index 8b0a8c1613..d6eadc9199 100644 --- a/compiler/rgobj.pas +++ b/compiler/rgobj.pas @@ -31,7 +31,7 @@ unit rgobj; uses cutils, cpubase, - aasmbase,aasmtai,aasmdata,aasmcpu, + aasmbase,aasmtai,aasmdata,aasmsym,aasmcpu, cclasses,globtype,cgbase,cgutils, cpuinfo ; @@ -177,12 +177,14 @@ unit rgobj; function getregisterinline(list:TAsmList;const subregconstraints:Tsubregisterset):Tregister; procedure ungetregisterinline(list:TAsmList;r:Tregister); function get_spill_subreg(r : tregister) : tsubregister;virtual; - function do_spill_replace(list:TAsmList;instr:taicpu;orgreg:tsuperregister;const spilltemp:treference):boolean;virtual; - procedure do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);virtual; - procedure do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);virtual; + function do_spill_replace(list:TAsmList;instr:tai_cpu_abstract_sym;orgreg:tsuperregister;const spilltemp:treference):boolean;virtual; + { the orgrsupeg parameter is only here for the llvm target, so it can + discover the def to use for the load } + procedure do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister;orgsupreg:tsuperregister);virtual; + procedure do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister;orgsupreg:tsuperregister);virtual; function instr_spill_register(list:TAsmList; - instr:taicpu; + instr:tai_cpu_abstract_sym; const r:Tsuperregisterset; const spilltemplist:Tspill_temp_list): boolean;virtual; procedure insert_regalloc_info_all(list:TAsmList); @@ -1974,11 +1976,11 @@ unit rgobj; end; end; ait_instruction: - with Taicpu(p) do + with tai_cpu_abstract_sym(p) do begin -// writeln(gas_op2str[taicpu(p).opcode]); +// writeln(gas_op2str[tai_cpu_abstract_sym(p).opcode]); current_filepos:=fileinfo; - if instr_spill_register(list,taicpu(p),regs_to_spill_set,spill_temps^) then + if instr_spill_register(list,tai_cpu_abstract_sym(p),regs_to_spill_set,spill_temps^) then spill_registers:=true; end; end; @@ -1993,15 +1995,15 @@ unit rgobj; end; - function trgobj.do_spill_replace(list:TAsmList;instr:taicpu;orgreg:tsuperregister;const spilltemp:treference):boolean; + function trgobj.do_spill_replace(list:TAsmList;instr:tai_cpu_abstract_sym;orgreg:tsuperregister;const spilltemp:treference):boolean; begin result:=false; end; - procedure trgobj.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister); + procedure trgobj.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister;orgsupreg:tsuperregister); var - ins:Taicpu; + ins:tai_cpu_abstract_sym; begin ins:=spilling_create_load(spilltemp,tempreg); add_cpu_interferences(ins); @@ -2012,9 +2014,9 @@ unit rgobj; end; - procedure Trgobj.do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister); + procedure Trgobj.do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister;orgsupreg:tsuperregister); var - ins:Taicpu; + ins:tai_cpu_abstract_sym; begin ins:=spilling_create_store(tempreg,spilltemp); add_cpu_interferences(ins); @@ -2032,7 +2034,7 @@ unit rgobj; function trgobj.instr_spill_register(list:TAsmList; - instr:taicpu; + instr:tai_cpu_abstract_sym; const r:Tsuperregisterset; const spilltemplist:Tspill_temp_list): boolean; var @@ -2233,7 +2235,7 @@ unit rgobj; if mustbespilled and regread then begin tempreg:=getregisterinline(list,regs[counter].spillregconstraints); - do_spill_read(list,tai(loadpos.previous),spilltemplist[orgreg],tempreg); + do_spill_read(list,tai(loadpos.previous),spilltemplist[orgreg],tempreg,orgreg); end; end; @@ -2273,7 +2275,7 @@ unit rgobj; begin if mustbespilled and regwritten then begin - do_spill_written(list,tai(storepos.previous),spilltemplist[orgreg],tempreg); + do_spill_written(list,tai(storepos.previous),spilltemplist[orgreg],tempreg,orgreg); ungetregisterinline(list,tempreg); end; end; diff --git a/compiler/sparc/rgcpu.pas b/compiler/sparc/rgcpu.pas index 5297337ecf..debeac44b7 100644 --- a/compiler/sparc/rgcpu.pas +++ b/compiler/sparc/rgcpu.pas @@ -35,8 +35,8 @@ unit rgcpu; trgcpu=class(trgobj) procedure add_constraints(reg:tregister);override; function get_spill_subreg(r : tregister) : tsubregister;override; - procedure do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override; - procedure do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister);override; + procedure do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override; + procedure do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); override; end; @@ -87,7 +87,7 @@ implementation end; - procedure trgcpu.do_spill_read(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister); + procedure trgcpu.do_spill_read(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); var helpins : tai; tmpref : treference; @@ -120,11 +120,11 @@ implementation helplist.free; end else - inherited do_spill_read(list,pos,spilltemp,tempreg); + inherited; end; - procedure trgcpu.do_spill_written(list:TAsmList;pos:tai;const spilltemp:treference;tempreg:tregister); + procedure trgcpu.do_spill_written(list: TAsmList; pos: tai; const spilltemp: treference; tempreg: tregister; orgsupreg: tsuperregister); var tmpref : treference; helplist : TAsmList; @@ -158,7 +158,7 @@ implementation helplist.free; end else - inherited do_spill_written(list,pos,spilltemp,tempreg); + inherited; end; end. diff --git a/compiler/x86/rgx86.pas b/compiler/x86/rgx86.pas index 235ce36b45..b0a8531816 100644 --- a/compiler/x86/rgx86.pas +++ b/compiler/x86/rgx86.pas @@ -30,13 +30,13 @@ unit rgx86; uses cclasses,globtype, cpubase,cpuinfo,cgbase,cgutils, - aasmbase,aasmtai,aasmdata,aasmcpu, + aasmbase,aasmtai,aasmdata,aasmsym,aasmcpu, rgobj; type trgx86 = class(trgobj) function get_spill_subreg(r : tregister) : tsubregister;override; - function do_spill_replace(list:TAsmList;instr:taicpu;orgreg:tsuperregister;const spilltemp:treference):boolean;override; + function do_spill_replace(list:TAsmList;instr:tai_cpu_abstract_sym;orgreg:tsuperregister;const spilltemp:treference):boolean;override; end; tpushedsavedloc = record @@ -107,7 +107,7 @@ implementation end; - function trgx86.do_spill_replace(list:TAsmList;instr:taicpu;orgreg:tsuperregister;const spilltemp:treference):boolean; + function trgx86.do_spill_replace(list:TAsmList;instr:tai_cpu_abstract_sym;orgreg:tsuperregister;const spilltemp:treference):boolean; {Decide wether a "replace" spill is possible, i.e. wether we can replace a register in an instruction by a memory reference. For example, in "mov ireg26d,0", the imaginary @@ -118,7 +118,7 @@ implementation is_subh: Boolean; begin result:=false; - with instr do + with taicpu(instr) do begin replaceoper:=-1; case ops of @@ -216,7 +216,7 @@ implementation begin { Some instructions don't allow memory references for source } - case instr.opcode of + case opcode of A_BT, A_BTS, A_BTC, @@ -233,7 +233,7 @@ implementation begin { Some instructions don't allow memory references for destination } - case instr.opcode of + case opcode of A_CMOVcc, A_MOVZX, A_MOVSX, @@ -306,7 +306,7 @@ implementation zeroing the upper 32 bits of the register. This does not happen with memory operations, so we have to perform these calculations in registers. } - if (instr.opsize=S_L) then + if (opsize=S_L) then replaceoper:=-1; {$endif x86_64}