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+ patch by J. Gareth Moreton: AddMov2LeaAdd and AddMov2Lea optimizations, resolves #38579
git-svn-id: trunk@48989 -
This commit is contained in:
florian
parent
6a92798603
commit
612f063795
@ -7025,7 +7025,7 @@ unit aoptx86;
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function TX86AsmOptimizer.OptPass2ADD(var p : tai) : boolean;
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function TX86AsmOptimizer.OptPass2ADD(var p : tai) : boolean;
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var
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var
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hp1: tai;
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hp1: tai; NewRef: TReference;
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{ This entire nested function is used in an if-statement below, but we
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{ This entire nested function is used in an if-statement below, but we
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want to avoid all the used reg transfers and GetNextInstruction calls
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want to avoid all the used reg transfers and GetNextInstruction calls
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@ -7045,45 +7045,103 @@ unit aoptx86;
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begin
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begin
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Result := False;
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Result := False;
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if not GetNextInstruction(p, hp1) or (hp1.typ <> ait_instruction) then
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Exit;
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{ Change:
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if (taicpu(p).opsize in [S_L{$ifdef x86_64}, S_Q{$endif}]) then
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add %reg2,%reg1
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mov/s/z #(%reg1),%reg1 (%reg1 superregisters must be the same)
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To:
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mov/s/z #(%reg1,%reg2),%reg1
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}
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if (taicpu(p).opsize in [S_L{$ifdef x86_64}, S_Q{$endif}]) and
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MatchOpType(taicpu(p), top_reg, top_reg) and
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GetNextInstruction(p, hp1) and
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MatchInstruction(hp1, [A_MOV, A_MOVZX, A_MOVSX{$ifdef x86_64}, A_MOVSXD{$endif}], []) and
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MatchOpType(taicpu(hp1), top_ref, top_reg) and
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(taicpu(hp1).oper[0]^.ref^.scalefactor <= 1) and
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(
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(
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(taicpu(hp1).oper[0]^.ref^.base = taicpu(p).oper[1]^.reg) and
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(taicpu(hp1).oper[0]^.ref^.index = NR_NO)
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) or (
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(taicpu(hp1).oper[0]^.ref^.index = taicpu(p).oper[1]^.reg) and
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(taicpu(hp1).oper[0]^.ref^.base = NR_NO)
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)
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) and (
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Reg1WriteOverwritesReg2Entirely(taicpu(p).oper[1]^.reg, taicpu(hp1).oper[1]^.reg) or
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(
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{ If the super registers ARE equal, then this MOV/S/Z does a partial write }
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not SuperRegistersEqual(taicpu(p).oper[1]^.reg, taicpu(hp1).oper[1]^.reg) and
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MemRegisterNotUsedLater
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)
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) then
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begin
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begin
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taicpu(hp1).oper[0]^.ref^.base := taicpu(p).oper[1]^.reg;
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{ Change:
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taicpu(hp1).oper[0]^.ref^.index := taicpu(p).oper[0]^.reg;
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add %reg2,%reg1
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mov/s/z #(%reg1),%reg1 (%reg1 superregisters must be the same)
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DebugMsg(SPeepholeOptimization + 'AddMov2Mov done', p);
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To:
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RemoveCurrentp(p, hp1);
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mov/s/z #(%reg1,%reg2),%reg1
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Result := True;
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}
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Exit;
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if MatchOpType(taicpu(p), top_reg, top_reg) and
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MatchInstruction(hp1, [A_MOV, A_MOVZX, A_MOVSX{$ifdef x86_64}, A_MOVSXD{$endif}], []) and
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MatchOpType(taicpu(hp1), top_ref, top_reg) and
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(taicpu(hp1).oper[0]^.ref^.scalefactor <= 1) and
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(
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(
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(taicpu(hp1).oper[0]^.ref^.base = taicpu(p).oper[1]^.reg) and
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(taicpu(hp1).oper[0]^.ref^.index = NR_NO)
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) or (
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(taicpu(hp1).oper[0]^.ref^.index = taicpu(p).oper[1]^.reg) and
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(taicpu(hp1).oper[0]^.ref^.base = NR_NO)
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)
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) and (
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Reg1WriteOverwritesReg2Entirely(taicpu(p).oper[1]^.reg, taicpu(hp1).oper[1]^.reg) or
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(
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{ If the super registers ARE equal, then this MOV/S/Z does a partial write }
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not SuperRegistersEqual(taicpu(p).oper[1]^.reg, taicpu(hp1).oper[1]^.reg) and
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MemRegisterNotUsedLater
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)
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) then
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begin
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taicpu(hp1).oper[0]^.ref^.base := taicpu(p).oper[1]^.reg;
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taicpu(hp1).oper[0]^.ref^.index := taicpu(p).oper[0]^.reg;
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DebugMsg(SPeepholeOptimization + 'AddMov2Mov done', p);
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RemoveCurrentp(p, hp1);
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Result := True;
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Exit;
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end;
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{ Change:
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addl/q $x,%reg1
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movl/q %reg1,%reg2
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To:
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leal/q $x(%reg1),%reg2
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addl/q $x,%reg1 (can be removed if %reg1 or the flags are not used afterwards)
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Breaks the dependency chain.
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}
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if MatchOpType(taicpu(p),top_const,top_reg) and
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MatchInstruction(hp1, A_MOV, [taicpu(p).opsize]) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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MatchOperand(taicpu(hp1).oper[0]^, taicpu(p).oper[1]^.reg) and
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(
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{ Don't do AddMov2LeaAdd under -Os, but do allow AddMov2Lea }
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not (cs_opt_size in current_settings.optimizerswitches) or
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(
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not RegUsedAfterInstruction(taicpu(p).oper[1]^.reg, hp1, TmpUsedRegs) and
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RegUsedAfterInstruction(NR_DEFAULTFLAGS, hp1, TmpUsedRegs)
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)
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) then
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begin
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{ Change the MOV instruction to a LEA instruction, and update the
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first operand }
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reference_reset(NewRef, 1, []);
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NewRef.base := taicpu(p).oper[1]^.reg;
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NewRef.scalefactor := 1;
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NewRef.offset := taicpu(p).oper[0]^.val;
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taicpu(hp1).opcode := A_LEA;
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taicpu(hp1).loadref(0, NewRef);
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
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if RegUsedAfterInstruction(NewRef.base, hp1, TmpUsedRegs) or
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RegUsedAfterInstruction(NR_DEFAULTFLAGS, hp1, TmpUsedRegs) then
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begin
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{ Move what is now the LEA instruction to before the SUB instruction }
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Asml.Remove(hp1);
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Asml.InsertBefore(hp1, p);
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AllocRegBetween(taicpu(hp1).oper[1]^.reg, hp1, p, UsedRegs);
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DebugMsg(SPeepholeOptimization + 'AddMov2LeaAdd', p);
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p := hp1;
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end
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else
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begin
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{ Since %reg1 or the flags aren't used afterwards, we can delete p completely }
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RemoveCurrentP(p, hp1);
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DebugMsg(SPeepholeOptimization + 'AddMov2Lea', p);
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end;
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Result := True;
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end;
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end;
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end;
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end;
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end;
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