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+ RiscV: FcmpAndi2Fcmp optimization
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@ -59,6 +59,7 @@ type
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function OptPass1SxxI(var p: tai): boolean;
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function OptPass1Add(var p: tai): boolean;
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function OptPass1Sub(var p: tai): boolean;
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function OptPass1Fcmp(var p: tai): boolean;
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procedure RemoveInstr(var orig: tai; moveback: boolean=true);
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end;
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@ -255,6 +256,39 @@ implementation
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end;
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function TRVCpuAsmOptimizer.OptPass1Fcmp(var p: tai) : boolean;
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var
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hp1 : tai;
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begin
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result:=false;
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{ replace
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<FOp> %reg3,%reg2,%reg1
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<mvop> %reg4,%reg3,%reg3
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dealloc %reg3
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by
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<FOp> %reg4,%reg2,%reg1
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?
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}
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if GetNextInstruction(p,hp1) and
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MatchInstruction(hp1,A_ANDI) and
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MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^) and
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((taicpu(hp1).oper[2]^.val and 1)=1) then
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begin
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TransferUsedRegs(TmpUsedRegs);
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UpdateUsedRegs(TmpUsedRegs, tai(p.next));
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if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg,hp1,TmpUsedRegs)) then
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begin
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taicpu(p).loadoper(0,taicpu(hp1).oper[0]^);
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DebugMsg('Peephole FcmpAndi2Fcmp done',p);
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RemoveInstruction(hp1);
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result:=true;
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end;
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end;
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end;
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function TRVCpuAsmOptimizer.OptPass1FSGNJ(var p: tai; mvop: tasmop): boolean;
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var
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hp1 : tai;
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@ -922,6 +956,13 @@ implementation
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A_FMADD_D,A_FMSUB_D,A_FNMSUB_D,A_FNMADD_D,
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A_FMIN_D,A_FMAX_D:
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result:=OptPass1FOP(p,A_FSGNJ_D);
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A_FEQ_S,
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A_FLT_S,
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A_FLE_S,
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A_FEQ_D,
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A_FLT_D,
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A_FLE_D:
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result:=OptPass1Fcmp(p);
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A_FSGNJ_S,
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A_FSGNJ_D:
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result:=OptPass1FSGNJ(p,taicpu(p).opcode);
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