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Update packages with information about RiscV.

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Fix g_external_wrapper, since it uses a register.
Fixed calling of gas.
Ported cprt0.

git-svn-id: branches/laksen/riscv_new@39475 -
This commit is contained in:
Jeppe Johansen 2018-07-20 10:40:28 +00:00
parent ceb38833f2
commit 6352328f3a
16 changed files with 3631 additions and 2669 deletions
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2
.gitattributes vendored
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@ -10315,6 +10315,7 @@ rtl/qnx/qnx.inc svneol=native#text/plain
rtl/qnx/rtldefs.inc svneol=native#text/plain rtl/qnx/rtldefs.inc svneol=native#text/plain
rtl/qnx/signal.inc svneol=native#text/plain rtl/qnx/signal.inc svneol=native#text/plain
rtl/qnx/system.pp svneol=native#text/plain rtl/qnx/system.pp svneol=native#text/plain
rtl/riscv32/cpuh.inc svneol=native#text/plain
rtl/riscv32/int64p.inc svneol=native#text/plain rtl/riscv32/int64p.inc svneol=native#text/plain
rtl/riscv32/makefile.cpu svneol=native#text/plain rtl/riscv32/makefile.cpu svneol=native#text/plain
rtl/riscv32/math.inc svneol=native#text/plain rtl/riscv32/math.inc svneol=native#text/plain
@ -10324,6 +10325,7 @@ rtl/riscv32/setjump.inc svneol=native#text/plain
rtl/riscv32/setjumph.inc svneol=native#text/plain rtl/riscv32/setjumph.inc svneol=native#text/plain
rtl/riscv32/strings.inc svneol=native#text/plain rtl/riscv32/strings.inc svneol=native#text/plain
rtl/riscv32/stringss.inc svneol=native#text/plain rtl/riscv32/stringss.inc svneol=native#text/plain
rtl/riscv64/cpuh.inc svneol=native#text/plain
rtl/riscv64/int64p.inc svneol=native#text/plain rtl/riscv64/int64p.inc svneol=native#text/plain
rtl/riscv64/makefile.cpu svneol=native#text/plain rtl/riscv64/makefile.cpu svneol=native#text/plain
rtl/riscv64/math.inc svneol=native#text/plain rtl/riscv64/math.inc svneol=native#text/plain

6
Makefile.fpc
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@ -85,6 +85,12 @@ endif
ifeq ($(CPU_TARGET),aarch64) ifeq ($(CPU_TARGET),aarch64)
PPSUF=a64 PPSUF=a64
endif endif
ifeq ($(CPU_TARGET),riscv32)
PPSUF=rv32
endif
ifeq ($(CPU_TARGET),riscv64)
PPSUF=rv64
endif
# cross compilers uses full cpu_target, not just ppc-suffix # cross compilers uses full cpu_target, not just ppc-suffix
# (except if the target cannot run a native compiler) # (except if the target cannot run a native compiler)

28
compiler/Makefile.fpc
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@ -32,7 +32,7 @@ fpcdir=..
unexport FPC_VERSION FPC_COMPILERINFO unexport FPC_VERSION FPC_COMPILERINFO
# Which platforms are ready for inclusion in the cycle # Which platforms are ready for inclusion in the cycle
CYCLETARGETS=i386 powerpc sparc arm x86_64 powerpc64 m68k armeb mipsel mips avr jvm i8086 aarch64 sparc64 CYCLETARGETS=i386 powerpc sparc arm x86_64 powerpc64 m68k armeb mipsel mips avr jvm i8086 aarch64 sparc64 riscv32 riscv64
# All supported targets used for clean # All supported targets used for clean
ALLTARGETS=$(CYCLETARGETS) ALLTARGETS=$(CYCLETARGETS)
@ -83,6 +83,12 @@ endif
ifdef AARCH64 ifdef AARCH64
PPC_TARGET=aarch64 PPC_TARGET=aarch64
endif endif
ifdef RISCV32
PPC_TARGET=riscv32
endif
ifdef RISCV64
PPC_TARGET=riscv64
endif
# Default is to generate a compiler for the same # Default is to generate a compiler for the same
# platform as CPU_TARGET (a native compiler) # platform as CPU_TARGET (a native compiler)
@ -213,6 +219,12 @@ endif
ifeq ($(CPC_TARGET),aarch64) ifeq ($(CPC_TARGET),aarch64)
CPUSUF=a64 CPUSUF=a64
endif endif
ifeq ($(CPC_TARGET),riscv32)
CPUSUF=rv32
endif
ifeq ($(CPC_TARGET),riscv64)
CPUSUF=rv64
endif
# Do not define the default -d$(CPU_TARGET) because that # Do not define the default -d$(CPU_TARGET) because that
# will conflict with our -d$(CPC_TARGET) # will conflict with our -d$(CPC_TARGET)
@ -315,6 +327,16 @@ ifeq ($(PPC_TARGET),i8086)
override LOCALOPT+=-Fux86 override LOCALOPT+=-Fux86
endif endif
# RiscV32 specific
ifeq ($(PPC_TARGET),riscv32)
override LOCALOPT+=-Furiscv
endif
# RiscV64 specific
ifeq ($(PPC_TARGET),riscv64)
override LOCALOPT+=-Furiscv
endif
OPTWPOCOLLECT=-OWdevirtcalls,optvmts -FW$(BASEDIR)/pp1.wpo OPTWPOCOLLECT=-OWdevirtcalls,optvmts -FW$(BASEDIR)/pp1.wpo
OPTWPOPERFORM=-Owdevirtcalls,optvmts -Fw$(BASEDIR)/pp1.wpo OPTWPOPERFORM=-Owdevirtcalls,optvmts -Fw$(BASEDIR)/pp1.wpo
# symbol liveness WPO requires nm, smart linking and no stripping (the latter # symbol liveness WPO requires nm, smart linking and no stripping (the latter
@ -432,7 +454,7 @@ endif
# CPU targets # CPU targets
##################################################################### #####################################################################
PPC_TARGETS=i386 m68k powerpc sparc arm armeb x86_64 powerpc64 mips mipsel avr jvm i8086 aarch64 sparc64 PPC_TARGETS=i386 m68k powerpc sparc arm armeb x86_64 powerpc64 mips mipsel avr jvm i8086 aarch64 sparc64 riscv32 riscv64
INSTALL_TARGETS=$(addsuffix _exe_install,$(sort $(CYCLETARGETS) $(PPC_TARGETS))) INSTALL_TARGETS=$(addsuffix _exe_install,$(sort $(CYCLETARGETS) $(PPC_TARGETS)))
SYMLINKINSTALL_TARGETS=$(addsuffix _symlink_install,$(sort $(CYCLETARGETS) $(PPC_TARGETS))) SYMLINKINSTALL_TARGETS=$(addsuffix _symlink_install,$(sort $(CYCLETARGETS) $(PPC_TARGETS)))
@ -802,7 +824,7 @@ ifeq ($(OS_SOURCE),win64)
EXCLUDE_80BIT_TARGETS=1 EXCLUDE_80BIT_TARGETS=1
endif endif
ifneq ($(findstring $(CPU_SOURCE),aarch64 arm avr jvm m68k mips mipsel powerpc powerpc64 sparc sparc64),) ifneq ($(findstring $(CPU_SOURCE),aarch64 arm avr jvm m68k mips mipsel powerpc powerpc64 sparc sparc64 riscv32 riscv64),)
EXCLUDE_80BIT_TARGETS=1 EXCLUDE_80BIT_TARGETS=1
endif endif

8
compiler/riscv/agrvgas.pas
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@ -212,11 +212,7 @@ unit agrvgas;
function TRVGNUAssembler.MakeCmdLine: TCmdStr; function TRVGNUAssembler.MakeCmdLine: TCmdStr;
begin begin
result := inherited MakeCmdLine; result := inherited MakeCmdLine;
{$ifdef cpu64bitaddr} Replace(result,'$ARCH',lower(cputypestr[current_settings.cputype]));
Replace(result,'$ARCH','-m64')
{$else cpu64bitaddr}
Replace(result,'$ARCH','-m32');
{$endif cpu64bitaddr}
end; end;
@ -227,7 +223,7 @@ unit agrvgas;
idtxt : 'AS'; idtxt : 'AS';
asmbin : 'as'; asmbin : 'as';
asmcmd : '-o $OBJ $EXTRAOPT $ARCH $ASM'; asmcmd : '-o $OBJ $EXTRAOPT -march=$ARCH $ASM';
supported_targets : [system_riscv32_linux,system_riscv64_linux]; supported_targets : [system_riscv32_linux,system_riscv64_linux];
flags : [af_needar,af_smartlink_sections]; flags : [af_needar,af_smartlink_sections];
labelprefix : '.L'; labelprefix : '.L';

43
compiler/riscv/hlcgrv.pas
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@ -34,11 +34,15 @@ uses
cgbase,cgutils,hlcgobj,hlcg2ll, parabase; cgbase,cgutils,hlcgobj,hlcg2ll, parabase;
type type
{ thlcgriscv }
thlcgriscv = class(thlcg2ll) thlcgriscv = class(thlcg2ll)
protected protected
procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tdef; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); override; procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tdef; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); override;
public public
procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override; procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
procedure g_external_wrapper(list: TAsmList; procdef: tprocdef; const wrappername, externalname: string; global: boolean); override;
end; end;
implementation implementation
@ -213,5 +217,44 @@ implementation
list.concat(Tai_symbol_end.Createname(labelname)); list.concat(Tai_symbol_end.Createname(labelname));
end; end;
procedure thlcgriscv.g_external_wrapper(list: TAsmList; procdef: tprocdef; const wrappername, externalname: string; global: boolean);
var
sym: tasmsymbol;
ai: taicpu;
href: treference;
tmpreg: TRegister;
l: TAsmLabel;
begin
maybe_new_object_file(list);
new_section(list,sec_code,wrappername,target_info.alignment.procalign);
if global then
begin
sym:=current_asmdata.DefineAsmSymbol(wrappername,AB_GLOBAL,AT_FUNCTION,procdef);
list.concat(Tai_symbol.Create_global(sym,0));
end
else
begin
sym:=current_asmdata.DefineAsmSymbol(wrappername,AB_LOCAL,AT_FUNCTION,procdef);
list.concat(Tai_symbol.Create(sym,0));
end;
reference_reset_symbol(href,current_asmdata.RefAsmSymbol(externalname,AT_FUNCTION),0,0,[]);
tmpreg:=NR_X5;
current_asmdata.getjumplabel(l);
a_label(list,l);
href.refaddr:=addr_pcrel_hi20;
list.concat(taicpu.op_reg_ref(A_AUIPC,tmpreg,href));
reference_reset_symbol(href,l,0,0,[]);
href.refaddr:=addr_pcrel_lo12;
ai:=taicpu.op_reg_reg_ref(A_JALR,NR_X0,tmpreg,href);
ai.is_jmp:=true;
list.concat(ai);
list.concat(Tai_symbol_end.Create(sym));
end;
end. end.

3
compiler/riscv32/cpunode.pas
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@ -31,6 +31,9 @@ unit cpunode;
{ generic nodes } { generic nodes }
ncgbas,ncgld,ncgflw,ncgcnv,ncgmem,ncgcon,ncgcal,ncgset,ncginl,ncgopt, ncgbas,ncgld,ncgflw,ncgcnv,ncgmem,ncgcon,ncgcal,ncgset,ncginl,ncgopt,
ncgobjc, ncgobjc,
{ symtable }
symcpu,
aasmdef,
{ to be able to only parts of the generic code, { to be able to only parts of the generic code,
the processor specific nodes must be included the processor specific nodes must be included
after the generic one (FK) after the generic one (FK)

1
compiler/riscv64/cpunode.pas
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@ -33,6 +33,7 @@ uses
ncgobjc, ncgobjc,
{ symtable } { symtable }
symcpu, symcpu,
aasmdef,
{ to be able to only parts of the generic code, { to be able to only parts of the generic code,
the processor specific nodes must be included the processor specific nodes must be included
after the generic one (FK) after the generic one (FK)

84
packages/fpmkunit/src/fpmkunit.pp
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@ -110,7 +110,7 @@ Type
// Please keep this order, see OSCPUSupported below // Please keep this order, see OSCPUSupported below
TCpu=(cpuNone, TCpu=(cpuNone,
i386,m68k,powerpc,sparc,x86_64,arm,powerpc64,avr,armeb, i386,m68k,powerpc,sparc,x86_64,arm,powerpc64,avr,armeb,
mips,mipsel,jvm,i8086,aarch64,sparc64 mips,mipsel,jvm,i8086,aarch64,sparc64,riscv32,riscv64
); );
TCPUS = Set of TCPU; TCPUS = Set of TCPU;
@ -185,46 +185,46 @@ Const
{ This table is kept OS,Cpu because it is easier to maintain (PFV) } { This table is kept OS,Cpu because it is easier to maintain (PFV) }
OSCPUSupported : array[TOS,TCpu] of boolean = ( OSCPUSupported : array[TOS,TCpu] of boolean = (
{ os none i386 m68k ppc sparc x86_64 arm ppc64 avr armeb mips mipsel jvm i8086 aarch64 sparc64} { os none i386 m68k ppc sparc x86_64 arm ppc64 avr armeb mips mipsel jvm i8086 aarch64 sparc64 riscv32 riscv64}
{ none } ( false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false), { none } ( false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ linux } ( false, true, true, true, true, true, true, true, false, true , true , true , false, false, true , true ), { linux } ( false, true, true, true, true, true, true, true, false, true , true , true , false, false, true , true , true , true ),
{ go32v2 } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false), { go32v2 } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ win32 } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false), { win32 } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ os2 } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false), { os2 } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ freebsd } ( false, true, true, false, false, true, false, false, false, false, false, false, false, false, false, false), { freebsd } ( false, true, true, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false),
{ beos } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false), { beos } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ netbsd } ( false, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false), { netbsd } ( false, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false),
{ amiga } ( false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false), { amiga } ( false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ atari } ( false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false), { atari } ( false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ solaris } ( false, true, false, false, true, true, false, false, false, false, false, false, false, false, false, false), { solaris } ( false, true, false, false, true, true, false, false, false, false, false, false, false, false, false, false, false, false),
{ qnx } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false), { qnx } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ netware } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false), { netware } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ openbsd } ( false, true, true, false, false, true, false, false, false, false, false, false, false, false, false, false), { openbsd } ( false, true, true, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false),
{ wdosx } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false), { wdosx } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ palmos } ( false, false, true, false, false, false, true, false, false, false, false, false, false, false, false, false), { palmos } ( false, false, true, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false),
{ macos } ( false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false), { macos } ( false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ darwin } ( false, true, false, true, false, true, true, true, false, false, false, false, false, false, true , false), { darwin } ( false, true, false, true, false, true, true, true, false, false, false, false, false, false, true , false, false, false),
{ emx } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false), { emx } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ watcom } ( false, true, false, false, false ,false, false, false, false, false, false, false, false, false, false, false), { watcom } ( false, true, false, false, false ,false, false, false, false, false, false, false, false, false, false, false, false, false),
{ morphos } ( false, false, false, true, false ,false, false, false, false, false, false, false, false, false, false, false), { morphos } ( false, false, false, true, false ,false, false, false, false, false, false, false, false, false, false, false, false, false),
{ netwlibc }( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false), { netwlibc }( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ win64 } ( false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false), { win64 } ( false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false),
{ wince }( false, true, false, false, false, false, true, false, false, false, false, false, false, false, false, false), { wince }( false, true, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false),
{ gba } ( false, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false), { gba } ( false, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false),
{ nds } ( false, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false), { nds } ( false, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false),
{ embedded }( false, true, true, true, true, true, true, true, true, true , false, false, false, true , false, false), { embedded }( false, true, true, true, true, true, true, true, true, true , false, false, false, true , false, false, true , true ),
{ symbian } ( false, true, false, false, false, false, true, false, false, false, false, false, false, false, false, false), { symbian } ( false, true, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false),
{ haiku } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false), { haiku } ( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ iphonesim}( false, true, false, false, false, true, false, false, false, false, false, false, false, false, false, false), { iphonesim}( false, true, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false),
{ aix } ( false, false, false, true, false, false, false, true, false, false, false, false, false, false, false, false), { aix } ( false, false, false, true, false, false, false, true, false, false, false, false, false, false, false, false, false, false),
{ java } ( false, false, false, false, false, false, false, false, false, false, false, false, true , false, false, false), { java } ( false, false, false, false, false, false, false, false, false, false, false, false, true , false, false, false, false, false),
{ android } ( false, true, false, false, false, false, true, false, false, false, false, true, true , false, false, false), { android } ( false, true, false, false, false, false, true, false, false, false, false, true, true , false, false, false, false, false),
{ nativent }( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false), { nativent }( false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ msdos } ( false, false, false, false, false, false, false, false, false, false, false, false, false, true , false, false), { msdos } ( false, false, false, false, false, false, false, false, false, false, false, false, false, true , false, false, false, false),
{ wii } ( false, false, false, true , false, false, false, false, false, false, false, false, false, false, false, false), { wii } ( false, false, false, true , false, false, false, false, false, false, false, false, false, false, false, false, false, false),
{ aros } ( true, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false), { aros } ( true, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false),
{ dragonfly}( false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false), { dragonfly}( false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false),
{ win16 } ( false, false, false, false, false, false, false, false, false, false, false, false, false, true , false, false) { win16 } ( false, false, false, false, false, false, false, false, false, false, false, false, false, true , false, false, false, false)
); );
// Useful // Useful
@ -2784,6 +2784,8 @@ begin
powerpc: result := GetGccDirArch('cpupowerpc','-m32'); powerpc: result := GetGccDirArch('cpupowerpc','-m32');
powerpc64:result := GetGccDirArch('cpupowerpc64','-m64'); powerpc64:result := GetGccDirArch('cpupowerpc64','-m64');
aarch64: result := GetGccDirArch('cpuaarch64',''); aarch64: result := GetGccDirArch('cpuaarch64','');
riscv32: result := GetGccDirArch('cpuriscv64','-march=rv32imafdc');
riscv64: result := GetGccDirArch('cpuriscv64','-march=rv64imafdc');
end {case} end {case}
else if OS = darwin then else if OS = darwin then
case CPU of case CPU of

5956
packages/fppkg/src/fpmkunitsrc.inc
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File diff suppressed because it is too large Load Diff

11
rtl/linux/Makefile.fpc
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@ -90,6 +90,10 @@ override LOADERS=
SYSINIT_UNITS=si_prc si_c si_g si_dll SYSINIT_UNITS=si_prc si_c si_g si_dll
endif endif
ifeq ($(ARCH),riscv64)
override LOADERS=prt0 cprt0
endif
# mipsel reuses mips files by including so some file names exist # mipsel reuses mips files by including so some file names exist
# twice, this causes the compiler to find sometimes wrong files and it tries # twice, this causes the compiler to find sometimes wrong files and it tries
# to recompile rtl units. To prevent this, compile always as release PPUs, this # to recompile rtl units. To prevent this, compile always as release PPUs, this
@ -196,6 +200,13 @@ ifeq ($(ARCH),sparc64)
ASSHAREDOPT=-KPIC ASSHAREDOPT=-KPIC
endif endif
ifeq ($(ARCH),riscv32)
ASTARGET=-march=rv32imafdc
endif
ifeq ($(ARCH),riscv64)
ASTARGET=-march=rv64imafdc
endif
ifeq ($(ARCH),arm) ifeq ($(ARCH),arm)
ifeq ($(SUBARCH),armv6m) ifeq ($(SUBARCH),armv6m)
ASTARGET+=-mthumb --def __thumb__=1 ASTARGET+=-mthumb --def __thumb__=1

2
rtl/linux/ostypes.inc
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@ -296,7 +296,7 @@ CONST
clone_flags_fork = $01200011; clone_flags_fork = $01200011;
{ SIGCHLD | CLONE_CHILD_CLEARTID | CLONE_CHILD_SETTID } { SIGCHLD | CLONE_CHILD_CLEARTID | CLONE_CHILD_SETTID }
{$if defined(cpuarm) or defined(cpualpha) or defined(cpublackfin) or defined(cpum68k) or defined(aarch64)} {$if defined(cpuarm) or defined(cpualpha) or defined(cpublackfin) or defined(cpum68k) or defined(aarch64) or defined(riscv32) or defined(riscv64)}
O_LARGEFILE = $20000; O_LARGEFILE = $20000;
{$endif} {$endif}
{$if defined(cpusparc) or defined(cpusparc64)} {$if defined(cpusparc) or defined(cpusparc64)}

68
rtl/linux/riscv64/cprt0.as
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@ -45,63 +45,79 @@
.globl _start .globl _start
.type _start,function .type _start,function
_start: _start:
.option push
.option norelax
1:auipc gp, %pcrel_hi(__global_pointer$)
addi gp, gp, %pcrel_lo(1b)
.option pop
/* Clear the frame pointer since this is the outermost frame. */ /* Clear the frame pointer since this is the outermost frame. */
mov fp, #0 addi fp, x0, 0
ldmia sp!, {a2} ld a2, 0(sp)
addi sp, sp, 8
/* Pop argc off the stack and save a pointer to argv */ /* Pop argc off the stack and save a pointer to argv */
ldr ip,=operatingsystem_parameter_argc 1:auipc x8,%pcrel_hi(operatingsystem_parameter_argc)
ldr a3,=operatingsystem_parameter_argv sd a2,%pcrel_lo(1b)(x8)
str a2,[ip] 1:auipc x8,%pcrel_hi(operatingsystem_parameter_argv)
sd sp,%pcrel_lo(1b)(x8)
/* calc envp */ addi a4, a2, 1
add a4,a2,#1 slli a4, a4, 3
add a4,sp,a4,LSL #2 add a4, sp, a4
ldr ip,=operatingsystem_parameter_envp
str sp,[a3] 1:auipc x8,%pcrel_hi(operatingsystem_parameter_envp)
str a4,[ip] sd a4,%pcrel_lo(1b)(x8)
/* Save initial stackpointer */ /* Save initial stackpointer */
ldr ip,=__stkptr 1:auipc x8,%pcrel_hi(__stkptr)
str sp,[ip] sd sp,%pcrel_lo(1b)(x8)
/* Fetch address of fini */ /* Fetch address of fini */
ldr ip, =_fini 1:auipc x8,%pcrel_hi(_fini)
addi a2,x8,%pcrel_lo(1b)
/* argc already loaded to a2*/ /* argc already loaded to a2*/
/* load argv */ /* load argv */
mov a3, sp addi a3, sp, 0
/* Push stack limit */ /* Push stack limit */
str a3, [sp, #-4]! sd a3, -8(sp)
addi sp, sp, -8
/* Push rtld_fini */ /* Push rtld_fini */
str a1, [sp, #-4]! sd a1, -8(sp)
addi sp, sp, -8
/* Set up the other arguments in registers */ /* Set up the other arguments in registers */
ldr a1, =PASCALMAIN 1:auipc x8,%pcrel_hi(PASCALMAIN)
ldr a4, =_init addi a1, x8, %pcrel_lo(1b)
1:auipc x8,%pcrel_hi(_init)
addi a4, x8, %pcrel_lo(1b)
/* Push fini */ /* Push fini */
str ip, [sp, #-4]! sd a2, -8(sp)
addi sp, sp, -8
/* __libc_start_main (main, argc, argv, init, fini, rtld_fini, stack_end) */ /* __libc_start_main (main, argc, argv, init, fini, rtld_fini, stack_end) */
/* Let the libc call main and exit with its return code. */ /* Let the libc call main and exit with its return code. */
bl __libc_start_main 1:auipc x8,%pcrel_hi(__libc_start_main)
jalr ra, x8, %pcrel_lo(1b)
/* should never get here....*/ /* should never get here....*/
bl abort 1:auipc x8,%pcrel_hi(abort)
jalr ra, x8, %pcrel_lo(1b)
.globl _haltproc .globl _haltproc
.type _haltproc,function .type _haltproc,function
_haltproc: _haltproc:
ldr r0,=operatingsystem_result 1:auipc x8,%pcrel_hi(operatingsystem_result)
ldrb r0,[r0] lbu x1,%pcrel_lo(1b)(x8)
swi 0x900001 addi x17, x0, 94
b _haltproc ecall
jal x0, _haltproc
/* Define a symbol for the first piece of initialized data. */ /* Define a symbol for the first piece of initialized data. */
.data .data

15
rtl/riscv32/cpuh.inc Normal file
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@ -0,0 +1,15 @@
{
This file is part of the Free Pascal run time library.
Copyright (c) 2016 by the Free Pascal development team.
CPU specific system unit header file
See the file COPYING.FPC, included in this distribution,
for details about the copyright.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
**********************************************************************}

15
rtl/riscv64/cpuh.inc Normal file
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@ -0,0 +1,15 @@
{
This file is part of the Free Pascal run time library.
Copyright (c) 2016 by the Free Pascal development team.
CPU specific system unit header file
See the file COPYING.FPC, included in this distribution,
for details about the copyright.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
**********************************************************************}

2
utils/fpcm/revision.inc
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@ -1 +1 @@
'2018-04-29 rev 38866' '2018-07-20 rev 39474'