mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-04-05 18:07:56 +02:00
* Removed/ifdefed lots of unused variables.
git-svn-id: trunk@48384 -
This commit is contained in:
yury
parent
7ffa963127
commit
64c586b86d
@ -265,7 +265,6 @@ unit agcpugas;
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sehlist,
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tmplist : TAsmList;
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xdatasym : tasmsymbol;
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unwindread,
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unwindrec : longword;
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begin
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if not assigned(list) then
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@ -754,8 +754,6 @@ Implementation
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function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
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var
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hp1: tai;
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begin
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result := false;
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if p.typ=ait_instruction then
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@ -817,8 +815,6 @@ Implementation
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function TCpuAsmOptimizer.PeepHoleOptPass2Cpu(var p: tai): boolean;
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var
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hp1: tai;
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begin
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result := false;
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if p.typ=ait_instruction then
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@ -497,7 +497,6 @@ implementation
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procedure TGNUAssembler.WriteSection(atype:TAsmSectiontype;const aname:string;aorder:TAsmSectionOrder;secalign:longint;secflags:TSectionFlags=[];secprogbits:TSectionProgbits=SPB_None);
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var
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s : string;
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secflag: TSectionFlag;
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usesectionprogbits,
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usesectionflags: boolean;
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begin
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@ -540,7 +540,6 @@ Implementation
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function TCpuAsmOptimizer.OptPass1ADDSUB(var p: tai): Boolean;
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var
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hp1,hp2: tai;
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oldreg: tregister;
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begin
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Result := OptPass1DataCheckMov(p);
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@ -621,7 +620,7 @@ Implementation
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function TCpuAsmOptimizer.OptPass1MUL(var p: tai): Boolean;
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var
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hp1,hp2: tai;
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hp1: tai;
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oldreg: tregister;
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begin
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Result := OptPass1DataCheckMov(p);
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@ -1099,7 +1098,7 @@ Implementation
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function TCpuAsmOptimizer.OptPass1MOV(var p: tai): Boolean;
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var
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hp1, hpfar1, hp2, hp3: tai;
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hp1, hpfar1, hp2: tai;
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i, i2: longint;
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tempop: tasmop;
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dealloc: tai_regalloc;
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@ -154,8 +154,6 @@ unit agavrgas;
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function getopstr(const o:toper) : string;
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var
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hs : string;
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first : boolean;
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r : tsuperregister;
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begin
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case o.typ of
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top_reg:
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@ -258,7 +258,6 @@ Implementation
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var
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hp1, hp2, hp3: tai;
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s: string;
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begin
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result:=false;
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@ -264,7 +264,6 @@ unit cgcpu;
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var
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i,j : longint;
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hp : PCGParaLocation;
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ref: treference;
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tmpreg: TRegister;
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begin
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if not(tcgsize2size[paraloc.Size] in [1..4]) then
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@ -417,7 +416,7 @@ unit cgcpu;
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procedure tcgavr.a_op_const_reg_reg_internal(list: TAsmList; op: TOpCg; size: tcgsize; a: tcgint; src,srchi,dst,dsthi: tregister);
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var
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tmpSrc, tmpDst, countreg: TRegister;
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countreg: TRegister;
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b, b2, i, j: byte;
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s1, s2, t1: integer;
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l1: TAsmLabel;
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@ -574,10 +573,7 @@ unit cgcpu;
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countreg,
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tmpreg: tregister;
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i : integer;
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instr : taicpu;
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paraloc1,paraloc2 : TCGPara;
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l1,l2 : tasmlabel;
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pd : tprocdef;
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hovloc: tlocation;
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{ NextRegDst* is sometimes called before the register usage and sometimes afterwards }
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@ -1093,7 +1089,6 @@ unit cgcpu;
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function tcgavr.normalize_ref(list:TAsmList;ref: treference;tmpreg : tregister) : treference;
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var
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tmpref : treference;
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l : tasmlabel;
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begin
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Result:=ref;
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@ -1702,8 +1697,7 @@ unit cgcpu;
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procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;
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cmp_op : topcmp;a : tcgint;reg : tregister;l : tasmlabel);
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var
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swapped , test_msb: boolean;
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tmpreg : tregister;
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swapped : boolean;
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i : byte;
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begin
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if a=0 then
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@ -1856,7 +1850,7 @@ unit cgcpu;
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procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
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var
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l : TAsmLabel;
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tmpflags : TResFlags;
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//tmpflags : TResFlags;
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i: Integer;
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hreg: TRegister;
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begin
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@ -1889,8 +1883,8 @@ unit cgcpu;
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procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
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var
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i : integer;
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{var
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i : integer; }
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begin
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case value of
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0:
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@ -400,7 +400,6 @@ unit cpupara;
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var
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cur_stack_offset: aword;
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curintreg, curfloatreg, curmmreg: tsuperregister;
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retcgsize : tcgsize;
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begin
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init_values(curintreg,curfloatreg,curmmreg,cur_stack_offset);
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@ -59,7 +59,7 @@ implementation
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procedure tavrnotnode.second_boolean;
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var
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tmpreg,lreg : tregister;
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tmpreg : tregister;
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i : longint;
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falselabel,truelabel,skiplabel: TAsmLabel;
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begin
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@ -326,10 +326,8 @@ Unit raavrgas;
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var
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tempreg : tregister;
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ireg : tsuperregister;
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hl : tasmlabel;
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ofs : longint;
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registerset : tcpuregisterset;
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tempstr : string;
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tempsymtyp : tasmsymtype;
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Begin
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@ -612,18 +610,16 @@ Unit raavrgas;
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function tavrattreader.is_asmopcode(const s: string):boolean;
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(*
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const
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{ sorted by length so longer postfixes will match first }
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postfix2strsorted : array[1..19] of string[2] = (
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'EP','SB','BT','SH',
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'IA','IB','DA','DB','FD','FA','ED','EA',
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'B','D','E','P','T','H','S');
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*)
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var
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len,
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j,
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sufidx : longint;
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j : longint;
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hs : string;
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maxlen : longint;
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icond : tasmcond;
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@ -56,8 +56,8 @@ unit rgcpu;
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procedure trgcpu.add_constraints(reg:tregister);
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var
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supreg,i : Tsuperregister;
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{var
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supreg,i : Tsuperregister;}
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begin
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case getsubreg(reg) of
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{ Let 64bit floats conflict with all odd float regs }
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@ -76,8 +76,8 @@ unit rgcpu;
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{ Let 64bit ints conflict with all odd int regs }
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R_SUBQ:
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begin
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supreg:=getsupreg(reg);
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{
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supreg:=getsupreg(reg);
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i:=RS_G1;
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while (i<=RS_I7) do
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begin
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@ -95,7 +95,6 @@ unit rgcpu;
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helpins : tai;
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tmpref : treference;
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helplist : TAsmList;
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hreg : tregister;
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begin
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if (abs(spilltemp.offset)>63) or (CPUAVR_16_REGS in cpu_capabilities[current_settings.cputype]) then
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begin
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@ -121,7 +120,6 @@ unit rgcpu;
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var
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tmpref : treference;
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helplist : TAsmList;
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hreg : tregister;
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begin
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if (abs(spilltemp.offset)>63) or (CPUAVR_16_REGS in cpu_capabilities[current_settings.cputype]) then
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begin
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@ -185,8 +183,6 @@ unit rgcpu;
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function trgcpu.do_spill_replace(list:TAsmList;instr:tai_cpu_abstract_sym;orgreg:tsuperregister;const spilltemp:treference):boolean;
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var
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b : byte;
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begin
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result:=false;
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if not(spilltemp.offset in [0..63]) or (CPUAVR_16_REGS in cpu_capabilities[current_settings.cputype]) then
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@ -101,8 +101,6 @@ unit cpupara;
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function tcpuparamanager.ret_in_param(def:tdef;pd:tabstractprocdef):boolean;
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var
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size: longint;
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begin
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if handle_common_ret_in_param(def,pd,result) then
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exit;
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@ -307,7 +305,6 @@ unit cpupara;
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var
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retcgsize : tcgsize;
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paraloc : pcgparalocation;
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sym: tfieldvarsym;
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usedef: tdef;
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handled: boolean;
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begin
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@ -57,7 +57,6 @@ uses
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hp: tnode;
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srsym: tsym;
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pd: tprocdef;
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resourcestrrec: trecorddef;
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begin
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{ support word/smallint constants, initialized with Seg() }
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if (def.ordtype in [u16bit,s16bit]) and (node.nodetype=inlinen) and
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@ -1126,9 +1126,6 @@ implementation
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function getopstr(const o:toper) : ansistring;
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var
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d: double;
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s: single;
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begin
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case o.typ of
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top_reg:
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@ -302,11 +302,11 @@ uses
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regnumber_index : array[tregisterindex] of tregisterindex = (
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{$i rjvmrni.inc}
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);
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(*
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std_regname_index : array[tregisterindex] of tregisterindex = (
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{$i rjvmsri.inc}
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);
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*)
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function reg_cgsize(const reg: tregister): tcgsize;
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begin
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result:=OS_NO;
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@ -161,7 +161,7 @@ implementation
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function tjvminlinenode.first_copy: tnode;
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var
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ppn: tcallparanode;
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arr, len, start, kind: tnode;
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arr, len, start: tnode;
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eledef: tdef;
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counter, ndims: longint;
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finaltype: char;
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@ -401,7 +401,6 @@ implementation
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lefttemp: ttempcreatenode;
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newblock: tblocknode;
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newstatement: tstatementnode;
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primitive: boolean;
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begin
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{ first parameter is the array, the rest are the dimensions }
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newparas:=tcallparanode(left).right;
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@ -78,7 +78,6 @@ implementation
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var
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tmpreg: tregister;
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lab: tasmlabel;
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ovloc: tlocation;
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op: topcg;
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isu32int: boolean;
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begin
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@ -575,7 +575,7 @@ implementation
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var
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t,vl,hp,lefttarget,righttarget, hp2: tnode;
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t,vl,lefttarget,righttarget: tnode;
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lt,rt : tnodetype;
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hdef,
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rd,ld , inttype: tdef;
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@ -3823,7 +3823,6 @@ implementation
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function taddnode.first_add64bitint: tnode;
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var
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procname: string[31];
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temp: tnode;
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power: longint;
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begin
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result := nil;
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@ -706,8 +706,10 @@ implementation
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function tblocknode.simplify(forinline : boolean): tnode;
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{$ifdef break_inlining}
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var
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a : array[0..3] of tstatementnode;
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{$endif break_inlining}
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begin
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result := nil;
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{ Warning: never replace a blocknode with another node type,
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@ -406,7 +406,6 @@ implementation
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hregisterhi,
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{$endif not cpu64bitalu and not cpuhighleveltarget}
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hregister : tregister;
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hloc: tlocation;
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begin
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{ set defaults }
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addconstant:=true;
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@ -1567,7 +1567,6 @@ implementation
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SegDef: TOmfRecord_SEGDEF;
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GrpDef: TOmfRecord_GRPDEF;
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nsections,ngroups: Integer;
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objsym: TObjSymbol;
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begin
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{ calc amount of sections we have and set their index, starting with 1 }
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nsections:=1;
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@ -3157,9 +3156,6 @@ implementation
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i: Integer;
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ExeSec: TMZExeSection;
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ObjSec: TOmfObjSection;
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StartDataPos: LongWord;
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buf: array [0..1023] of byte;
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bytesread: LongWord;
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begin
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Header.LoadableImageSize:=0;
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ExeSec:=MZFlatContentSection;
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@ -3271,7 +3267,6 @@ implementation
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i: Integer;
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ExeSec: TMZExeSection;
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ObjSec: TOmfObjSection;
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StartDataPos: LongWord;
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buf: array [0..1023] of byte;
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bytesread: LongWord;
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begin
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@ -4102,9 +4097,8 @@ cleanup:
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function TNewExeEntryTable.GetSize: QWord;
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var
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CurBundleStart, i: Integer;
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CurBundleStart: Integer;
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CurBundleSize: Byte;
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cp: TNewExeEntryPoint;
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begin
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Result:=0;
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CurBundleStart:=1;
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@ -563,8 +563,6 @@ unit optloop;
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function OptimizeForLoop_iterforloops(var n: tnode; arg: pointer): foreachnoderesult;
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var
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hp : tnode;
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begin
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Result:=fen_false;
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if (n.nodetype=forn) and
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@ -1312,7 +1312,7 @@ implementation
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nodeset : THashSet absolute arg;
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entry : ptempinfo_flags_entry;
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i : longint;
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hashsetitem: PHashSetItem;
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{hashsetitem: PHashSetItem;}
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begin
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result:=fen_true;
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case n.nodetype of
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@ -1362,7 +1362,6 @@ unit scandir;
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procedure dir_setpeflags;
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var
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ident : string;
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flags : int64;
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begin
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if not (target_info.system in (systems_all_windows)) then
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@ -1378,7 +1377,6 @@ unit scandir;
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procedure dir_setpeoptflags;
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var
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ident : string;
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flags : int64;
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begin
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if not (target_info.system in (systems_all_windows)) then
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@ -2343,8 +2343,10 @@ implementation
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function tstoreddef.is_intregable : boolean;
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{$ifndef cpuhighleveltarget}
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var
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recsize,temp: longint;
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{$endif cpuhighleveltarget}
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begin
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case typ of
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orddef,
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@ -231,7 +231,6 @@ end;
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Function TLinkerBSD.WriteResponseFile(isdll:boolean) : Boolean;
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Var
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linkres : TLinkRes;
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FilesList : TLinkRes;
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i : longint;
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HPath : TCmdStrListItem;
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s,s1,s2 : TCmdStr;
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@ -581,7 +580,6 @@ var
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targetstr,
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emulstr : TCmdStr;
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GCSectionsStr : string[63];
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exportedsyms: text;
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success : boolean;
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begin
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MakeSharedLibrary:=false;
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@ -320,8 +320,7 @@ implementation
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FilesList : TLinkRes;
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i : longint;
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HPath : TCmdStrListItem;
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s,s1,s2 : TCmdStr;
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Fl1,Fl2 : Boolean;
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s : TCmdStr;
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begin
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WriteResponseFile:=False;
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if ReOrderEntries Then
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@ -1676,17 +1676,14 @@ function TLinkerEmbedded.postprocessexecutable(const fn : string;isdll:boolean):
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function TlinkerEmbedded_SdccSdld.WriteResponseFile: Boolean;
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Var
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linkres : TLinkRes;
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i : longint;
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HPath : TCmdStrListItem;
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s,s1,s2 : TCmdStr;
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//i : longint;
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//HPath : TCmdStrListItem;
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s{,s1,s2} : TCmdStr;
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prtobj,
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cprtobj : string[80];
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linklibc : boolean;
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found1,
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found2 : boolean;
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{$if defined(ARM)}
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LinkStr : string;
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{$endif}
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//found1,
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//found2 : boolean;
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begin
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WriteResponseFile:=False;
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linklibc:=(SharedLibFiles.Find('c')<>nil);
|
||||
|
||||
@ -944,7 +944,6 @@ end;
|
||||
function TlinkerFreeRTOS.MakeExecutable:boolean;
|
||||
var
|
||||
StaticStr,
|
||||
S,
|
||||
binstr,
|
||||
cmdstr,
|
||||
mapstr: Ansistring;
|
||||
@ -953,9 +952,12 @@ var
|
||||
DynLinkStr,
|
||||
StripStr,
|
||||
FixedExeFileName: string;
|
||||
{$ifdef XTENSA}
|
||||
S: Ansistring;
|
||||
t: Text;
|
||||
hp: TCmdStrListItem;
|
||||
filepath: TCmdStr;
|
||||
{$endif XTENSA}
|
||||
begin
|
||||
{$ifdef XTENSA}
|
||||
{ idfpath can be set by -Ff, else default to environment value of IDF_PATH }
|
||||
|
||||
@ -430,7 +430,9 @@ implementation
|
||||
l1,l2,l3,l4 {$ifdef ARM} ,l5 {$endif ARM} : tasmlabel;
|
||||
importname : string;
|
||||
suffix : integer;
|
||||
{$ifndef AARCH64}
|
||||
href : treference;
|
||||
{$endif AARCH64}
|
||||
i,j : longint;
|
||||
ImportLibrary : TImportLibrary;
|
||||
ImportSymbol : TImportSymbol;
|
||||
|
||||
@ -238,7 +238,6 @@ function TExternalLinkerWin16WLink.WriteResponseFile(isdll: boolean): Boolean;
|
||||
Var
|
||||
linkres : TLinkRes;
|
||||
s : string;
|
||||
i: Integer;
|
||||
begin
|
||||
WriteResponseFile:=False;
|
||||
|
||||
|
||||
@ -921,6 +921,7 @@ implementation
|
||||
Intel 64 and IA-32 Architectures Software Developer’s Manual
|
||||
Volume 2B: Instruction Set Reference, N-Z, January 2015
|
||||
}
|
||||
{$ifndef i8086}
|
||||
alignarray_cmovcpus:array[0..10] of string[11]=(
|
||||
#$66#$66#$66#$0F#$1F#$84#$00#$00#$00#$00#$00,
|
||||
#$66#$66#$0F#$1F#$84#$00#$00#$00#$00#$00,
|
||||
@ -933,6 +934,7 @@ implementation
|
||||
#$0F#$1F#$00,
|
||||
#$66#$90,
|
||||
#$90);
|
||||
{$endif i8086}
|
||||
{$ifdef i8086}
|
||||
alignarray:array[0..5] of string[8]=(
|
||||
#$90#$90#$90#$90#$90#$90#$90,
|
||||
|
||||
@ -53,7 +53,9 @@ interface
|
||||
private
|
||||
FSections: TFPHashObjectList;
|
||||
FGroups: TFPHashObjectList;
|
||||
{$ifndef i8086}
|
||||
using_relative : boolean;
|
||||
{$endif i8086}
|
||||
function CodeSectionName(const aname:string): string;
|
||||
procedure WriteReference(var ref : treference);
|
||||
procedure WriteOper(const o:toper;s : topsize; opcode: tasmop;ops:longint;dest : boolean);
|
||||
@ -681,10 +683,6 @@ interface
|
||||
end;
|
||||
|
||||
procedure TX86NasmAssembler.WriteGroups;
|
||||
{$ifdef i8086}
|
||||
var
|
||||
i: Integer;
|
||||
{$endif i8086}
|
||||
begin
|
||||
{$ifdef i8086}
|
||||
if target_info.system in [system_i8086_msdos,system_i8086_win16,system_i8086_embedded] then
|
||||
|
||||
@ -1654,9 +1654,6 @@ unit aoptx86;
|
||||
|
||||
{ Replaces all references to AOldReg in a memory reference to ANewReg }
|
||||
class function TX86AsmOptimizer.ReplaceRegisterInRef(var ref: TReference; const AOldReg, ANewReg: TRegister): Boolean;
|
||||
var
|
||||
OldSupReg: TSuperRegister;
|
||||
OldSubReg, MemSubReg: TSubRegister;
|
||||
begin
|
||||
Result := False;
|
||||
{ For safety reasons, only check for exact register matches }
|
||||
@ -1681,7 +1678,7 @@ unit aoptx86;
|
||||
class function TX86AsmOptimizer.ReplaceRegisterInOper(const p: taicpu; const OperIdx: Integer; const AOldReg, ANewReg: TRegister): Boolean;
|
||||
var
|
||||
OldSupReg, NewSupReg: TSuperRegister;
|
||||
OldSubReg, NewSubReg, MemSubReg: TSubRegister;
|
||||
OldSubReg, NewSubReg: TSubRegister;
|
||||
OldRegType: TRegisterType;
|
||||
ThisOper: POper;
|
||||
begin
|
||||
@ -1839,7 +1836,6 @@ unit aoptx86;
|
||||
function TX86AsmOptimizer.DeepMOVOpt(const p_mov: taicpu; const hp: taicpu): Boolean;
|
||||
var
|
||||
CurrentReg, ReplaceReg: TRegister;
|
||||
SubReg: TSubRegister;
|
||||
begin
|
||||
Result := False;
|
||||
|
||||
@ -3210,8 +3206,7 @@ unit aoptx86;
|
||||
|
||||
function TX86AsmOptimizer.OptPass1LEA(var p : tai) : boolean;
|
||||
var
|
||||
hp1, hp2, hp3: tai;
|
||||
l : ASizeInt;
|
||||
hp1: tai;
|
||||
ref: Integer;
|
||||
saveref: treference;
|
||||
TempReg: TRegister;
|
||||
@ -5686,13 +5681,15 @@ unit aoptx86;
|
||||
|
||||
function TX86AsmOptimizer.OptPass2Jcc(var p : tai) : boolean;
|
||||
var
|
||||
hp1,hp2,hp3,hp4,hpmov2: tai;
|
||||
carryadd_opcode : TAsmOp;
|
||||
hp1,hp2: tai;
|
||||
{$ifndef i8086}
|
||||
hp3,hp4,hpmov2: tai;
|
||||
l : Longint;
|
||||
condition : TAsmCond;
|
||||
{$endif i8086}
|
||||
carryadd_opcode : TAsmOp;
|
||||
symbol: TAsmSymbol;
|
||||
reg: tsuperregister;
|
||||
regavailable: Boolean;
|
||||
increg, tmpreg: TRegister;
|
||||
begin
|
||||
result:=false;
|
||||
@ -7072,12 +7069,14 @@ unit aoptx86;
|
||||
|
||||
|
||||
function TX86AsmOptimizer.PostPeepholeOptPush(var p : tai) : Boolean;
|
||||
{$ifdef x86_64}
|
||||
var
|
||||
hp1, hp2, hp3, hp4, hp5: tai;
|
||||
{$endif x86_64}
|
||||
begin
|
||||
Result:=false;
|
||||
hp5:=nil;
|
||||
{$ifdef x86_64}
|
||||
hp5:=nil;
|
||||
{ replace
|
||||
push %rax
|
||||
call procname
|
||||
|
||||
@ -447,9 +447,9 @@ unit cgx86;
|
||||
var
|
||||
hreg : tregister;
|
||||
href : treference;
|
||||
{$ifndef x86_64}
|
||||
{$ifdef i386}
|
||||
add_hreg: boolean;
|
||||
{$endif not x86_64}
|
||||
{$endif i386}
|
||||
begin
|
||||
hreg:=NR_NO;
|
||||
{ make_simple_ref() may have already been called earlier, and in that
|
||||
@ -1083,7 +1083,9 @@ unit cgx86;
|
||||
procedure tcgx86.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
|
||||
var
|
||||
dirref,tmpref : treference;
|
||||
{$ifndef i8086}
|
||||
tmpreg : TRegister;
|
||||
{$endif i8086}
|
||||
begin
|
||||
dirref:=ref;
|
||||
|
||||
@ -3231,10 +3233,12 @@ unit cgx86;
|
||||
|
||||
{$ifdef x86}
|
||||
{$ifndef NOTARGETWIN}
|
||||
{$ifndef i8086}
|
||||
var
|
||||
href : treference;
|
||||
i : integer;
|
||||
again : tasmlabel;
|
||||
{$endif i8086}
|
||||
{$endif NOTARGETWIN}
|
||||
{$endif x86}
|
||||
begin
|
||||
|
||||
@ -1144,6 +1144,7 @@ implementation
|
||||
|
||||
|
||||
procedure tx86inlinenode.second_fma;
|
||||
{$ifndef i8086}
|
||||
const
|
||||
op : array[false..true,false..true,s32real..s64real,0..3] of TAsmOp =
|
||||
(
|
||||
@ -1178,6 +1179,7 @@ implementation
|
||||
negop3,
|
||||
negproduct,
|
||||
gotmem : boolean;
|
||||
{$endif i8086}
|
||||
begin
|
||||
{$ifndef i8086}
|
||||
if (cpu_capabilities[current_settings.cputype]*[CPUX86_HAS_FMA,CPUX86_HAS_FMA4])<>[] then
|
||||
@ -1444,6 +1446,7 @@ implementation
|
||||
|
||||
|
||||
procedure tx86inlinenode.second_minmax;
|
||||
{$ifndef i8086}
|
||||
const
|
||||
oparray : array[false..true,false..true,s32real..s64real] of TAsmOp =
|
||||
(
|
||||
@ -1463,6 +1466,7 @@ implementation
|
||||
i : integer;
|
||||
gotmem : boolean;
|
||||
op: TAsmOp;
|
||||
{$endif i8086}
|
||||
begin
|
||||
{$ifndef i8086}
|
||||
if
|
||||
|
||||
@ -164,10 +164,6 @@ interface
|
||||
|
||||
|
||||
procedure tx86unaryminusnode.second_float;
|
||||
var
|
||||
reg : tregister;
|
||||
href : treference;
|
||||
l1 : tasmlabel;
|
||||
begin
|
||||
secondpass(left);
|
||||
|
||||
|
||||
@ -420,7 +420,7 @@ implementation
|
||||
start,stop : byte; {Start/stop when range; Stop=element when an element.}
|
||||
end;
|
||||
var
|
||||
hreg,hreg2,
|
||||
hreg,{$ifndef i8086} hreg2, {$endif}
|
||||
pleftreg : tregister;
|
||||
opsize : tcgsize;
|
||||
opdef : torddef;
|
||||
|
||||
@ -1475,8 +1475,6 @@ procedure Tx86Instruction.SetInstructionOpsize;
|
||||
end;
|
||||
end;
|
||||
|
||||
var
|
||||
isBCastMemRef: boolean;
|
||||
begin
|
||||
if opsize<>S_NO then
|
||||
exit;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user