* avoid shifter constant overflow on arm when optimizing two shifter operations into one

git-svn-id: trunk@11474 -
This commit is contained in:
florian 2008-07-28 15:51:58 +00:00
parent fe7cba52dc
commit 66e015f48c
3 changed files with 33 additions and 0 deletions

1
.gitattributes vendored
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@ -7446,6 +7446,7 @@ tests/test/cg/variants/tvarol96.pp svneol=native#text/plain
tests/test/dumpclass.pp svneol=native#text/plain
tests/test/dumpmethods.pp svneol=native#text/plain
tests/test/opt/README -text
tests/test/opt/tarmshift.pp svneol=native#text/plain
tests/test/opt/tcaseopt1.pp svneol=native#text/plain
tests/test/opt/tcmov.pp svneol=native#text/plain
tests/test/opt/tcse1.pp svneol=native#text/plain

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@ -40,6 +40,7 @@ Type
Implementation
uses
verbose,
aasmbase,aasmcpu;
function CanBeCond(p : tai) : boolean;
@ -51,6 +52,7 @@ Implementation
function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
var
next1: tai;
hp1: tai;
begin
result := false;
case p.typ of
@ -82,6 +84,24 @@ Implementation
(taicpu(p).oper[2]^.shifterop^.shiftmode=taicpu(next1).oper[2]^.shifterop^.shiftmode) then
begin
inc(taicpu(p).oper[2]^.shifterop^.shiftimm,taicpu(next1).oper[2]^.shifterop^.shiftimm);
{ avoid overflows }
if taicpu(p).oper[2]^.shifterop^.shiftimm>31 then
case taicpu(p).oper[2]^.shifterop^.shiftmode of
SM_ROR:
taicpu(p).oper[2]^.shifterop^.shiftimm:=taicpu(p).oper[2]^.shifterop^.shiftimm and 31;
SM_ASR:
taicpu(p).oper[2]^.shifterop^.shiftimm:=31;
SM_LSR,
SM_LSL:
begin
hp1:=taicpu.op_reg_const(A_MOV,taicpu(p).oper[0]^.reg,0);
InsertLLItem(p.previous, p.next, hp1);
p.free;
p:=hp1;
end;
else
internalerror(2008072803);
end;
asml.remove(next1);
next1.free;
result := true;

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@ -0,0 +1,12 @@
{ %norun }
{ %opt=-O2 }
var
i : longint;
begin
i:=1234;
i:=i shl 23;
i:=i shl 23;
if i<>0 then
halt(1);
end.