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JccAdd2SetccAdd modified to make use of GetIntRegisterBetween
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30166f8eb7
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@ -2698,7 +2698,6 @@ implementation
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for r:=low(regs_to_save_int) to high(regs_to_save_int) do
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if regs_to_save_int[r] in rg[R_INTREGISTER].used_in_proc then
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inc(size,sizeof(aint));
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if uses_registers(R_ADDRESSREGISTER) then
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for r:=low(regs_to_save_int) to high(regs_to_save_int) do
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if regs_to_save_int[r] in rg[R_ADDRESSREGISTER].used_in_proc then
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@ -2714,9 +2713,7 @@ implementation
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for r:=low(regs_to_save_mm) to high(regs_to_save_mm) do
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if regs_to_save_mm[r] in rg[R_MMREGISTER].used_in_proc then
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begin
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inc(size,tcgsize2size[OS_VECTOR]);
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end;
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inc(size,tcgsize2size[OS_VECTOR]);
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end;
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if size>0 then
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@ -9738,7 +9738,6 @@ unit aoptx86;
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{$endif i8086}
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carryadd_opcode : TAsmOp;
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symbol: TAsmSymbol;
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reg: tsuperregister;
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increg, tmpreg: TRegister;
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begin
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result:=false;
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@ -9832,76 +9831,66 @@ unit aoptx86;
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else if not(cs_opt_size in current_settings.optimizerswitches) then
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begin
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{ search for an available register which is volatile }
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for reg in tcpuregisterset do
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increg := GetIntRegisterBetween(R_SUBL, UsedRegs, p, hp1);
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if increg <> NR_NO then
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begin
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if
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{$if defined(i386) or defined(i8086)}
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{ Only use registers whose lowest 8-bits can Be accessed }
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(reg in [RS_EAX,RS_EBX,RS_ECX,RS_EDX]) and
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{$endif i386 or i8086}
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(reg in paramanager.get_volatile_registers_int(current_procinfo.procdef.proccalloption)) and
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not(reg in UsedRegs[R_INTREGISTER].GetUsedRegs)
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{ We don't need to check if tmpreg is in hp1 or not, because
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it will be marked as in use at p (if not, this is
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indictive of a compiler bug). }
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then
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{ We don't need to check if tmpreg is in hp1 or not, because
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it will be marked as in use at p (if not, this is
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indictive of a compiler bug). }
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TAsmLabel(symbol).decrefs;
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Taicpu(p).clearop(0);
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Taicpu(p).ops:=1;
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Taicpu(p).is_jmp:=false;
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Taicpu(p).opcode:=A_SETcc;
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DebugMsg(SPeepholeOptimization+'JccAdd2SetccAdd',p);
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Taicpu(p).condition:=inverse_cond(Taicpu(p).condition);
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Taicpu(p).loadreg(0,increg);
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if getsubreg(Taicpu(hp1).oper[1]^.reg)<>R_SUBL then
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begin
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TAsmLabel(symbol).decrefs;
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increg := newreg(R_INTREGISTER,reg,R_SUBL);
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Taicpu(p).clearop(0);
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Taicpu(p).ops:=1;
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Taicpu(p).is_jmp:=false;
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Taicpu(p).opcode:=A_SETcc;
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DebugMsg(SPeepholeOptimization+'JccAdd2SetccAdd',p);
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Taicpu(p).condition:=inverse_cond(Taicpu(p).condition);
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Taicpu(p).loadreg(0,increg);
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if getsubreg(Taicpu(hp1).oper[1]^.reg)<>R_SUBL then
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begin
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case getsubreg(Taicpu(hp1).oper[1]^.reg) of
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R_SUBW:
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begin
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tmpreg := newreg(R_INTREGISTER,reg,R_SUBW);
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hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BW,increg,tmpreg);
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end;
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R_SUBD:
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begin
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tmpreg := newreg(R_INTREGISTER,reg,R_SUBD);
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hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BL,increg,tmpreg);
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end;
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{$ifdef x86_64}
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R_SUBQ:
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begin
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{ MOVZX doesn't have a 64-bit variant, because
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the 32-bit version implicitly zeroes the
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upper 32-bits of the destination register }
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hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BL,increg,
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newreg(R_INTREGISTER,reg,R_SUBD));
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tmpreg := newreg(R_INTREGISTER,reg,R_SUBQ);
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end;
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{$endif x86_64}
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else
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Internalerror(2020030601);
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case getsubreg(Taicpu(hp1).oper[1]^.reg) of
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R_SUBW:
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begin
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tmpreg := newreg(R_INTREGISTER,getsupreg(increg),R_SUBW);
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hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BW,increg,tmpreg);
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end;
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taicpu(hp2).fileinfo:=taicpu(hp1).fileinfo;
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asml.InsertAfter(hp2,p);
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end
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else
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tmpreg := increg;
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R_SUBD:
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begin
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tmpreg := newreg(R_INTREGISTER,getsupreg(increg),R_SUBD);
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hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BL,increg,tmpreg);
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end;
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{$ifdef x86_64}
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R_SUBQ:
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begin
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{ MOVZX doesn't have a 64-bit variant, because
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the 32-bit version implicitly zeroes the
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upper 32-bits of the destination register }
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tmpreg := newreg(R_INTREGISTER,getsupreg(increg),R_SUBD);
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hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BL,increg,tmpreg);
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setsubreg(tmpreg, R_SUBQ);
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end;
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{$endif x86_64}
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else
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Internalerror(2020030601);
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end;
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taicpu(hp2).fileinfo:=taicpu(hp1).fileinfo;
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asml.InsertAfter(hp2,p);
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end
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else
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tmpreg := increg;
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if (Taicpu(hp1).opcode=A_INC) or (Taicpu(hp1).opcode=A_DEC) then
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begin
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Taicpu(hp1).ops:=2;
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Taicpu(hp1).loadoper(1,Taicpu(hp1).oper[0]^)
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end;
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Taicpu(hp1).loadreg(0,tmpreg);
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AllocRegBetween(tmpreg,p,hp1,UsedRegs);
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Result := True;
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{ p is no longer a Jcc instruction, so exit }
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Exit;
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if (Taicpu(hp1).opcode=A_INC) or (Taicpu(hp1).opcode=A_DEC) then
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begin
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Taicpu(hp1).ops:=2;
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Taicpu(hp1).loadoper(1,Taicpu(hp1).oper[0]^)
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end;
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Taicpu(hp1).loadreg(0,tmpreg);
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AllocRegBetween(tmpreg,p,hp1,UsedRegs);
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Result := True;
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{ p is no longer a Jcc instruction, so exit }
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Exit;
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end;
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end;
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end;
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