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JccAdd2SetccAdd modified to make use of GetIntRegisterBetween

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J. Gareth "Curious Kit" Moreton 2021-12-25 21:44:22 +00:00 committed by FPK
parent 30166f8eb7
commit 67a1d52806
2 changed files with 56 additions and 70 deletions
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5
compiler/cgobj.pas
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@ -2698,7 +2698,6 @@ implementation
for r:=low(regs_to_save_int) to high(regs_to_save_int) do for r:=low(regs_to_save_int) to high(regs_to_save_int) do
if regs_to_save_int[r] in rg[R_INTREGISTER].used_in_proc then if regs_to_save_int[r] in rg[R_INTREGISTER].used_in_proc then
inc(size,sizeof(aint)); inc(size,sizeof(aint));
if uses_registers(R_ADDRESSREGISTER) then if uses_registers(R_ADDRESSREGISTER) then
for r:=low(regs_to_save_int) to high(regs_to_save_int) do for r:=low(regs_to_save_int) to high(regs_to_save_int) do
if regs_to_save_int[r] in rg[R_ADDRESSREGISTER].used_in_proc then if regs_to_save_int[r] in rg[R_ADDRESSREGISTER].used_in_proc then
@ -2714,9 +2713,7 @@ implementation
for r:=low(regs_to_save_mm) to high(regs_to_save_mm) do for r:=low(regs_to_save_mm) to high(regs_to_save_mm) do
if regs_to_save_mm[r] in rg[R_MMREGISTER].used_in_proc then if regs_to_save_mm[r] in rg[R_MMREGISTER].used_in_proc then
begin inc(size,tcgsize2size[OS_VECTOR]);
inc(size,tcgsize2size[OS_VECTOR]);
end;
end; end;
if size>0 then if size>0 then

121
compiler/x86/aoptx86.pas
View File

@ -9738,7 +9738,6 @@ unit aoptx86;
{$endif i8086} {$endif i8086}
carryadd_opcode : TAsmOp; carryadd_opcode : TAsmOp;
symbol: TAsmSymbol; symbol: TAsmSymbol;
reg: tsuperregister;
increg, tmpreg: TRegister; increg, tmpreg: TRegister;
begin begin
result:=false; result:=false;
@ -9832,76 +9831,66 @@ unit aoptx86;
else if not(cs_opt_size in current_settings.optimizerswitches) then else if not(cs_opt_size in current_settings.optimizerswitches) then
begin begin
{ search for an available register which is volatile } { search for an available register which is volatile }
for reg in tcpuregisterset do increg := GetIntRegisterBetween(R_SUBL, UsedRegs, p, hp1);
if increg <> NR_NO then
begin begin
if { We don't need to check if tmpreg is in hp1 or not, because
{$if defined(i386) or defined(i8086)} it will be marked as in use at p (if not, this is
{ Only use registers whose lowest 8-bits can Be accessed } indictive of a compiler bug). }
(reg in [RS_EAX,RS_EBX,RS_ECX,RS_EDX]) and TAsmLabel(symbol).decrefs;
{$endif i386 or i8086} Taicpu(p).clearop(0);
(reg in paramanager.get_volatile_registers_int(current_procinfo.procdef.proccalloption)) and Taicpu(p).ops:=1;
not(reg in UsedRegs[R_INTREGISTER].GetUsedRegs) Taicpu(p).is_jmp:=false;
{ We don't need to check if tmpreg is in hp1 or not, because Taicpu(p).opcode:=A_SETcc;
it will be marked as in use at p (if not, this is DebugMsg(SPeepholeOptimization+'JccAdd2SetccAdd',p);
indictive of a compiler bug). } Taicpu(p).condition:=inverse_cond(Taicpu(p).condition);
then Taicpu(p).loadreg(0,increg);
if getsubreg(Taicpu(hp1).oper[1]^.reg)<>R_SUBL then
begin begin
TAsmLabel(symbol).decrefs; case getsubreg(Taicpu(hp1).oper[1]^.reg) of
increg := newreg(R_INTREGISTER,reg,R_SUBL); R_SUBW:
Taicpu(p).clearop(0); begin
Taicpu(p).ops:=1; tmpreg := newreg(R_INTREGISTER,getsupreg(increg),R_SUBW);
Taicpu(p).is_jmp:=false; hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BW,increg,tmpreg);
Taicpu(p).opcode:=A_SETcc;
DebugMsg(SPeepholeOptimization+'JccAdd2SetccAdd',p);
Taicpu(p).condition:=inverse_cond(Taicpu(p).condition);
Taicpu(p).loadreg(0,increg);
if getsubreg(Taicpu(hp1).oper[1]^.reg)<>R_SUBL then
begin
case getsubreg(Taicpu(hp1).oper[1]^.reg) of
R_SUBW:
begin
tmpreg := newreg(R_INTREGISTER,reg,R_SUBW);
hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BW,increg,tmpreg);
end;
R_SUBD:
begin
tmpreg := newreg(R_INTREGISTER,reg,R_SUBD);
hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BL,increg,tmpreg);
end;
{$ifdef x86_64}
R_SUBQ:
begin
{ MOVZX doesn't have a 64-bit variant, because
the 32-bit version implicitly zeroes the
upper 32-bits of the destination register }
hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BL,increg,
newreg(R_INTREGISTER,reg,R_SUBD));
tmpreg := newreg(R_INTREGISTER,reg,R_SUBQ);
end;
{$endif x86_64}
else
Internalerror(2020030601);
end; end;
taicpu(hp2).fileinfo:=taicpu(hp1).fileinfo; R_SUBD:
asml.InsertAfter(hp2,p); begin
end tmpreg := newreg(R_INTREGISTER,getsupreg(increg),R_SUBD);
else hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BL,increg,tmpreg);
tmpreg := increg; end;
{$ifdef x86_64}
R_SUBQ:
begin
{ MOVZX doesn't have a 64-bit variant, because
the 32-bit version implicitly zeroes the
upper 32-bits of the destination register }
tmpreg := newreg(R_INTREGISTER,getsupreg(increg),R_SUBD);
hp2:=Taicpu.op_reg_reg(A_MOVZX,S_BL,increg,tmpreg);
setsubreg(tmpreg, R_SUBQ);
end;
{$endif x86_64}
else
Internalerror(2020030601);
end;
taicpu(hp2).fileinfo:=taicpu(hp1).fileinfo;
asml.InsertAfter(hp2,p);
end
else
tmpreg := increg;
if (Taicpu(hp1).opcode=A_INC) or (Taicpu(hp1).opcode=A_DEC) then if (Taicpu(hp1).opcode=A_INC) or (Taicpu(hp1).opcode=A_DEC) then
begin begin
Taicpu(hp1).ops:=2; Taicpu(hp1).ops:=2;
Taicpu(hp1).loadoper(1,Taicpu(hp1).oper[0]^) Taicpu(hp1).loadoper(1,Taicpu(hp1).oper[0]^)
end;
Taicpu(hp1).loadreg(0,tmpreg);
AllocRegBetween(tmpreg,p,hp1,UsedRegs);
Result := True;
{ p is no longer a Jcc instruction, so exit }
Exit;
end; end;
Taicpu(hp1).loadreg(0,tmpreg);
AllocRegBetween(tmpreg,p,hp1,UsedRegs);
Result := True;
{ p is no longer a Jcc instruction, so exit }
Exit;
end; end;
end; end;
end; end;