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* improve RiscV assembler optimizer

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florian 2024-10-03 22:56:47 +02:00
parent 42f15792ec
commit 683b566cb7
1 changed files with 12 additions and 1 deletions
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13
compiler/riscv/aoptcpurv.pas
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@ -332,7 +332,11 @@ implementation
(taicpu(p).oper[2]^.typ=top_const) and (taicpu(p).oper[2]^.typ=top_const) and
(taicpu(p).oper[2]^.val=0) and (taicpu(p).oper[2]^.val=0) and
GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
MatchInstruction(hp1, [A_SUB,A_ADD,A_SLL,A_SLT,A_AND,A_OR{$ifdef riscv64}{$endif}]) and MatchInstruction(hp1, [A_SUB,A_ADD,A_SLL,A_SRL,A_SLT,A_AND,A_OR,
A_ADDI,A_ANDI,A_ORI,A_SRAI,A_SRLI,A_SLLI,A_XORI
{$ifdef riscv64},A_ADDIW,A_SLLIW,A_SRLIW,A_SRAIW,
A_ADDW,A_SLLW,A_SRLW,A_SUBW,A_SRAW{$endif}]
) and
(taicpu(hp1).ops=3) and (taicpu(hp1).ops=3) and
(MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[2]^) or MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^)) and (MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[2]^) or MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^)) and
(not RegModifiedBetween(taicpu(p).oper[1]^.reg, p,hp1)) and (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p,hp1)) and
@ -622,6 +626,13 @@ implementation
RemoveInstr(p); RemoveInstr(p);
result:=true; result:=true;
end end
else if (taicpu(p).oper[2]^.val=0) then
begin
{ this enables further optimizations }
DebugMsg('Peephole S*LI x,y,0 to addi performed', p);
taicpu(p).opcode:=A_ADDI;
result:=true;
end
else else
result:=OptPass1OP(p); result:=OptPass1OP(p);
end; end;