From 6aa01a99a988c876313bf4dc763b093f9cdc1837 Mon Sep 17 00:00:00 2001 From: daniel Date: Fri, 25 Apr 2003 08:25:26 +0000 Subject: [PATCH] * Ifdefs around a lot of calls to cleartempgen * Fixed registers that are allocated but not freed in several nodes * Tweak to register allocator to cause less spills * 8-bit registers now interfere with esi,edi and ebp Compiler can now compile rtl successfully when using new register allocator --- compiler/aasmtai.pas | 20 ++++++--- compiler/i386/cpubase.pas | 13 +++++- compiler/i386/n386set.pas | 26 ++++++++++-- compiler/i386/rgcpu.pas | 27 +++++++++++- compiler/ncgcal.pas | 12 +++++- compiler/ncginl.pas | 14 +++++-- compiler/ncgset.pas | 16 ++++++- compiler/nflw.pas | 38 ++++++++++++++++- compiler/nset.pas | 16 ++++++- compiler/pstatmnt.pas | 12 +++++- compiler/rgobj.pas | 87 +++++++++++++++++++++++++-------------- 11 files changed, 229 insertions(+), 52 deletions(-) diff --git a/compiler/aasmtai.pas b/compiler/aasmtai.pas index 99eb3f6e1d..1dffb357e7 100644 --- a/compiler/aasmtai.pas +++ b/compiler/aasmtai.pas @@ -1793,10 +1793,12 @@ uses else if Taicpu_abstract(p).oper[i].typ=Top_ref then begin r:=Taicpu_abstract(p).oper[i].ref; - r^.base.number:=(r^.base.number and $ff) or - (table[r^.base.number shr 8] shl 8); - r^.index.number:=(r^.index.number and $ff) or - (table[r^.index.number shr 8] shl 8); + if r^.base.number<>NR_NO then + r^.base.number:=(r^.base.number and $ff) or + (table[r^.base.number shr 8] shl 8); + if r^.index.number<>NR_NO then + r^.index.number:=(r^.index.number and $ff) or + (table[r^.index.number shr 8] shl 8); end; if Taicpu_abstract(p).is_nop then begin @@ -1814,7 +1816,15 @@ uses end. { $Log$ - Revision 1.24 2003-04-24 13:03:01 florian + Revision 1.25 2003-04-25 08:25:26 daniel + * Ifdefs around a lot of calls to cleartempgen + * Fixed registers that are allocated but not freed in several nodes + * Tweak to register allocator to cause less spills + * 8-bit registers now interfere with esi,edi and ebp + Compiler can now compile rtl successfully when using new register + allocator + + Revision 1.24 2003/04/24 13:03:01 florian * comp is now written with its bit pattern to the ppu instead as an extended Revision 1.23 2003/04/22 14:33:38 peter diff --git a/compiler/i386/cpubase.pas b/compiler/i386/cpubase.pas index ede6e41fd6..f0c046acea 100644 --- a/compiler/i386/cpubase.pas +++ b/compiler/i386/cpubase.pas @@ -682,7 +682,8 @@ implementation NR_ES: r.enum:=R_ES; NR_FS: r.enum:=R_FS; NR_GS: r.enum:=R_GS; NR_SS: r.enum:=R_SS; else - internalerror(200301082); +{ internalerror(200301082);} + r.enum:=R_TR3; end; end; @@ -798,7 +799,15 @@ implementation end. { $Log$ - Revision 1.49 2003-04-22 23:50:23 peter + Revision 1.50 2003-04-25 08:25:26 daniel + * Ifdefs around a lot of calls to cleartempgen + * Fixed registers that are allocated but not freed in several nodes + * Tweak to register allocator to cause less spills + * 8-bit registers now interfere with esi,edi and ebp + Compiler can now compile rtl successfully when using new register + allocator + + Revision 1.49 2003/04/22 23:50:23 peter * firstpass uses expectloc * checks if there are differences between the expectloc and location.loc from secondpass in EXTDEBUG diff --git a/compiler/i386/n386set.pas b/compiler/i386/n386set.pas index 5e06849c52..64ddb7e92c 100644 --- a/compiler/i386/n386set.pas +++ b/compiler/i386/n386set.pas @@ -254,6 +254,7 @@ implementation {$endif} opsize := S_L; emit_ref_reg(A_MOVZX,S_BL,left.location.reference,pleftreg); + location_release(exprasmlist,left.location); end; { Get a label to jump to the end } @@ -272,6 +273,7 @@ implementation { "x in [y..z]" expression } adjustment := 0; + r.enum:=R_NO; for i:=1 to numparts do if setparts[i].range then { use fact that a <= x <= b <=> cardinal(x-a) <= cardinal(b-a) } @@ -285,13 +287,17 @@ implementation { so in case of a LOC_CREGISTER first move the value } { to edi (not done before because now we can do the } { move and substract in one instruction with LEA) } - if (pleftreg.number <> NR_EDI) and + if {$ifndef newra}(pleftreg.number <> NR_EDI) and{$endif} (left.location.loc = LOC_CREGISTER) then begin + rg.ungetregister(exprasmlist,pleftreg); + {$ifdef newra} + r:=rg.getregisterint(exprasmlist,OS_INT); + {$else} r.enum:=R_INTREGISTER; r.number:=NR_EDI; - rg.ungetregister(exprasmlist,pleftreg); rg.getexplicitregisterint(exprasmlist,NR_EDI); + {$endif} reference_reset_base(href,pleftreg,-setparts[i].start); emit_ref_reg(A_LEA,S_L,href,r); { only now change pleftreg since previous value is } @@ -352,6 +358,11 @@ implementation right.location.reference.symbol:=nil; { Now place the end label } cg.a_label(exprasmlist,l); + {$ifdef newra} + rg.ungetregisterint(exprasmlist,pleftreg); + if r.enum=R_INTREGISTER then + rg.ungetregisterint(exprasmlist,r); + {$else} case left.location.loc of LOC_REGISTER, LOC_CREGISTER : @@ -364,6 +375,7 @@ implementation rg.ungetregisterint(exprasmlist,r); end; end; + {$endif} end else begin @@ -726,7 +738,15 @@ begin end. { $Log$ - Revision 1.55 2003-04-23 09:51:16 daniel + Revision 1.56 2003-04-25 08:25:26 daniel + * Ifdefs around a lot of calls to cleartempgen + * Fixed registers that are allocated but not freed in several nodes + * Tweak to register allocator to cause less spills + * 8-bit registers now interfere with esi,edi and ebp + Compiler can now compile rtl successfully when using new register + allocator + + Revision 1.55 2003/04/23 09:51:16 daniel * Removed usage of edi in a lot of places when new register allocator used + Added newra versions of g_concatcopy and secondadd_float diff --git a/compiler/i386/rgcpu.pas b/compiler/i386/rgcpu.pas index 233af37bed..3910f00aea 100644 --- a/compiler/i386/rgcpu.pas +++ b/compiler/i386/rgcpu.pas @@ -39,8 +39,8 @@ unit rgcpu; fpuvaroffset : byte; { to keep the same allocation order as with the old routines } -{$ifndef newra} function getregisterint(list:Taasmoutput;size:Tcgsize):Tregister;override; +{$ifndef newra} function getaddressregister(list:Taasmoutput):Tregister;override; procedure ungetregisterint(list:Taasmoutput;r:Tregister); override; function getexplicitregisterint(list:Taasmoutput;r:Tnewregister):Tregister;override; @@ -167,6 +167,21 @@ unit rgcpu; { trgcpu } {************************************************************************} +{$ifdef newra} + function Trgcpu.getregisterint(list:Taasmoutput;size:Tcgsize):Tregister; + + begin + getregisterint:=inherited getregisterint(list,size); + if size in [OS_8,OS_S8] then + begin + {These registers have no 8-bit subregister, so add interferences.} + add_edge(getregisterint.number shr 8,RS_ESI); + add_edge(getregisterint.number shr 8,RS_EDI); + add_edge(getregisterint.number shr 8,RS_EBP); + end; + end; +{$endif} + {$ifndef newra} function trgcpu.getregisterint(list:Taasmoutput;size:Tcgsize):Tregister; @@ -566,7 +581,15 @@ end. { $Log$ - Revision 1.20 2003-04-23 14:42:08 daniel + Revision 1.21 2003-04-25 08:25:26 daniel + * Ifdefs around a lot of calls to cleartempgen + * Fixed registers that are allocated but not freed in several nodes + * Tweak to register allocator to cause less spills + * 8-bit registers now interfere with esi,edi and ebp + Compiler can now compile rtl successfully when using new register + allocator + + Revision 1.20 2003/04/23 14:42:08 daniel * Further register allocator work. Compiler now smaller with new allocator than without. * Somebody forgot to adjust ppu version number diff --git a/compiler/ncgcal.pas b/compiler/ncgcal.pas index 884e0126b9..be758ddbc3 100644 --- a/compiler/ncgcal.pas +++ b/compiler/ncgcal.pas @@ -1314,7 +1314,9 @@ implementation { inlined code block are (JM) } rg.resetusableregisters; rg.clearregistercount; + {$ifndef newra} rg.cleartempgen; + {$endif} if assigned(inlineprocdef.regvarinfo) then with pregvarinfo(inlineprocdef.regvarinfo)^ do for i := 1 to maxvarregs do @@ -1465,7 +1467,15 @@ begin end. { $Log$ - Revision 1.51 2003-04-22 23:50:22 peter + Revision 1.52 2003-04-25 08:25:26 daniel + * Ifdefs around a lot of calls to cleartempgen + * Fixed registers that are allocated but not freed in several nodes + * Tweak to register allocator to cause less spills + * 8-bit registers now interfere with esi,edi and ebp + Compiler can now compile rtl successfully when using new register + allocator + + Revision 1.51 2003/04/22 23:50:22 peter * firstpass uses expectloc * checks if there are differences between the expectloc and location.loc from secondpass in EXTDEBUG diff --git a/compiler/ncginl.pas b/compiler/ncginl.pas index d9045e3b5b..45999e3cc3 100644 --- a/compiler/ncginl.pas +++ b/compiler/ncginl.pas @@ -349,7 +349,6 @@ implementation else cg.a_op_const_reg(exprasmlist,cgop,1,location.register); - cg.g_overflowcheck(exprasmlist,self); cg.g_rangecheck(exprasmlist,self,resulttype.def); end; @@ -433,8 +432,9 @@ implementation {$endif cpu64bit} cg.a_op_reg_loc(exprasmlist,addsubop[inlinenumber], hregister,tcallparanode(left).left.location); - location_release(exprasmlist,tcallparanode(tcallparanode(left).right).left.location); + location_release(exprasmlist,tcallparanode(tcallparanode(left).right).left.location); end; + location_release(exprasmlist,tcallparanode(left).left.location); cg.g_overflowcheck(exprasmlist,tcallparanode(left).left); cg.g_rangecheck(exprasmlist,tcallparanode(left).left,tcallparanode(left).left.resulttype.def); end; @@ -671,7 +671,15 @@ end. { $Log$ - Revision 1.26 2003-04-24 22:29:57 florian + Revision 1.27 2003-04-25 08:25:26 daniel + * Ifdefs around a lot of calls to cleartempgen + * Fixed registers that are allocated but not freed in several nodes + * Tweak to register allocator to cause less spills + * 8-bit registers now interfere with esi,edi and ebp + Compiler can now compile rtl successfully when using new register + allocator + + Revision 1.26 2003/04/24 22:29:57 florian * fixed a lot of PowerPC related stuff Revision 1.25 2003/04/22 23:50:22 peter diff --git a/compiler/ncgset.pas b/compiler/ncgset.pas index 82315196d9..d5bb9143f1 100644 --- a/compiler/ncgset.pas +++ b/compiler/ncgset.pas @@ -948,7 +948,9 @@ implementation jmp_lt:=OC_B; jmp_le:=OC_BE; end; + {$ifndef newra} rg.cleartempgen; + {$endif} { save current truelabel and falselabel } isjump:=false; if left.location.loc=LOC_JUMP then @@ -1070,7 +1072,9 @@ implementation hp:=tstatementnode(right); while assigned(hp) do begin + {$ifndef newra} rg.cleartempgen; + {$endif} { relabel when inlining } if inlining_procedure then begin @@ -1089,7 +1093,9 @@ implementation { ...and the else block } if assigned(elseblock) then begin + {$ifndef newra} rg.cleartempgen; + {$endif} secondpass(elseblock); load_all_regvars(exprasmlist); end; @@ -1115,7 +1121,15 @@ begin end. { $Log$ - Revision 1.30 2003-04-22 23:50:23 peter + Revision 1.31 2003-04-25 08:25:26 daniel + * Ifdefs around a lot of calls to cleartempgen + * Fixed registers that are allocated but not freed in several nodes + * Tweak to register allocator to cause less spills + * 8-bit registers now interfere with esi,edi and ebp + Compiler can now compile rtl successfully when using new register + allocator + + Revision 1.30 2003/04/22 23:50:23 peter * firstpass uses expectloc * checks if there are differences between the expectloc and location.loc from secondpass in EXTDEBUG diff --git a/compiler/nflw.pas b/compiler/nflw.pas index 89310e7ec9..821e4ea1be 100644 --- a/compiler/nflw.pas +++ b/compiler/nflw.pas @@ -400,7 +400,9 @@ implementation { calc register weight } if not(cs_littlesize in aktglobalswitches ) then rg.t_times:=rg.t_times*8; + {$ifndef newra} rg.cleartempgen; + {$endif} firstpass(left); if codegenerror then @@ -414,7 +416,9 @@ implementation { loop instruction } if assigned(right) then begin + {$ifndef newra} rg.cleartempgen; + {$endif} firstpass(right); if codegenerror then exit; @@ -560,7 +564,9 @@ implementation result:=nil; expectloc:=LOC_VOID; old_t_times:=rg.t_times; + {$ifndef newra} rg.cleartempgen; + {$endif} firstpass(left); registers32:=left.registers32; registersfpu:=left.registersfpu; @@ -577,7 +583,9 @@ implementation { if path } if assigned(right) then begin + {$ifndef newra} rg.cleartempgen; + {$endif} firstpass(right); if registers32nil) and (length(adj^)nil then + for i:=0 to movelist[u]^.count-1 do + begin + m:=movelist[u]^.data[i]; + if Tmoveins(m).moveset in [ms_worklist_moves,ms_active_moves] then + begin + x:=Tmoveins(m).instruction.oper[0].reg.number shr 8; + y:=Tmoveins(m).instruction.oper[1].reg.number shr 8; + if get_alias(y)=get_alias(u) then + v:=get_alias(x) + else + v:=get_alias(y); + {Move m from active_moves/worklist_moves to frozen_moves.} + if Tmoveins(m).moveset=ms_active_moves then + active_moves.remove(m) + else + worklist_moves.remove(m); + Tmoveins(m).moveset:=ms_frozen_moves; + frozen_moves.insert(m); + + if not(move_related(v)) and (degree[v]