diff --git a/tests/webtbs/tw39922.pp b/tests/webtbs/tw39922.pp
new file mode 100644
index 0000000000..d977153cc8
--- /dev/null
+++ b/tests/webtbs/tw39922.pp
@@ -0,0 +1,31 @@
+{ %OPT=-O3 }
+
+{ Test triggers "mov $0,%reg" being inserted on the wrong side of a SETcc instruction }
+program tw39922.pp;
+
+{$mode objfpc}
+
+uses sysutils;
+
+function isAlpha(c : Byte): Integer;
+begin
+  if ((AnsiChar(c) >= 'A') and (AnsiChar(c) <= 'Z')) or
+     ((AnsiChar(c) >= 'a') and (AnsiChar(c) <= 'z'))
+  then
+    Result := 1
+  else
+    Result := 0;
+end;
+
+begin
+  if (isAlpha(Byte('u')) = 0) then
+    Halt(1);
+
+  if (isAlpha(Byte('A')) = 0) then
+    Halt(2);
+
+  if (isAlpha(Byte('2')) = 1) then
+    Halt(3);
+	
+  WriteLn('ok');
+end.
diff --git a/tests/webtbs/tw39922a.pp b/tests/webtbs/tw39922a.pp
new file mode 100644
index 0000000000..a646369fc0
--- /dev/null
+++ b/tests/webtbs/tw39922a.pp
@@ -0,0 +1,4 @@
+{ %OPT=-O3 -Os }
+
+{ Test ensures the -Os version of "J(c)Mov1Jmp/RetMov0Jmp/Ret -> Set(~c)Jmp/Ret" is performed correctly }
+{$I tw39922.pp}
\ No newline at end of file