From 6c4d218b8d1c00cec55f889ab5fab9639a8159fe Mon Sep 17 00:00:00 2001 From: florian Date: Thu, 3 Apr 2025 23:14:43 +0200 Subject: [PATCH] * use for threadvars on RiscV always the size optimization code path as loading addresses is expensive --- compiler/ncgld.pas | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/compiler/ncgld.pas b/compiler/ncgld.pas index def7be4f98..f7ce870221 100644 --- a/compiler/ncgld.pas +++ b/compiler/ncgld.pas @@ -326,8 +326,12 @@ implementation else reference_reset_symbol(tvref,current_asmdata.WeakRefAsmSymbol(gvs.mangledname,AT_DATA),0,sizeof(pint),[]); { Enable size optimization with -Os or PIC code is generated and PIC uses GOT } - size_opt:=(cs_opt_size in current_settings.optimizerswitches) - or ((cs_create_pic in current_settings.moduleswitches) and (tf_pic_uses_got in target_info.flags)); + size_opt:={$if defined(RISCV)} + true + {$else defined(RISCV)} + (cs_opt_size in current_settings.optimizerswitches) + or ((cs_create_pic in current_settings.moduleswitches) and (tf_pic_uses_got in target_info.flags)) + {$endif defined(RISCV)}; hreg_tv_rec:=NR_INVALID; if size_opt then begin