paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-08-12 04:26:13 +02:00
Code Issues Packages Projects Releases Wiki Activity

+ Risc-V 32: optimize QWord(1) shl ...

Browse Source
This commit is contained in:
florian 2024-07-28 21:17:25 +02:00
parent 08bf5f7201
commit 6d157b5bf0
1 changed files with 16 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
compiler/riscv32/nrv32mat.pas
View File

@ -218,13 +218,22 @@ implementation
emit_instr(taicpu.op_reg_reg_reg(A_SLL,resreg.reghi,lreg.reglo,tmpreg1));
cg.a_jmp_always(current_asmdata.CurrAsmList,finished);
cg.a_label(current_asmdata.CurrAsmList,less32);
emit_instr(taicpu.op_reg_const(A_LI,tmpreg1,31));
emit_instr(taicpu.op_reg_reg_const(A_SRLI,tmpreg2,lreg.reglo,1));
emit_instr(taicpu.op_reg_reg_reg(A_SUB,tmpreg1,tmpreg1,right.location.register64.reglo));
emit_instr(taicpu.op_reg_reg_reg(A_SLL,resreg.reglo,lreg.reglo,right.location.register64.reglo));
emit_instr(taicpu.op_reg_reg_reg(A_SRL,tmpreg2,tmpreg2,tmpreg1));
emit_instr(taicpu.op_reg_reg_reg(A_SLL,resreg.reghi,lreg.reghi,right.location.register64.reglo));
emit_instr(taicpu.op_reg_reg_reg(A_OR,resreg.reghi,resreg.reghi,tmpreg2));
{ simple case were we know where the bit ends up, usefull when bitmasks are created }
if (left.nodetype=ordconstn) and (tordconstnode(left).value=1) then
begin
emit_instr(taicpu.op_reg_reg_reg(A_SLL,resreg.reglo,lreg.reglo,right.location.register64.reglo));
emit_instr(taicpu.op_reg_const(A_LI,resreg.reghi,0));
end
else
begin
emit_instr(taicpu.op_reg_const(A_LI,tmpreg1,31));
emit_instr(taicpu.op_reg_reg_const(A_SRLI,tmpreg2,lreg.reglo,1));
emit_instr(taicpu.op_reg_reg_reg(A_SUB,tmpreg1,tmpreg1,right.location.register64.reglo));
emit_instr(taicpu.op_reg_reg_reg(A_SLL,resreg.reglo,lreg.reglo,right.location.register64.reglo));
emit_instr(taicpu.op_reg_reg_reg(A_SRL,tmpreg2,tmpreg2,tmpreg1));
emit_instr(taicpu.op_reg_reg_reg(A_SLL,resreg.reghi,lreg.reghi,right.location.register64.reglo));
emit_instr(taicpu.op_reg_reg_reg(A_OR,resreg.reghi,resreg.reghi,tmpreg2));
end;
end
else
begin