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* create common aasmcpu (currently ppc32 version, will commit
merged ppc32/ppc64 version right after this one) git-svn-id: trunk@5319 -
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vendored
@ -294,7 +294,6 @@ compiler/pexports.pas svneol=native#text/plain
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compiler/pexpr.pas svneol=native#text/plain
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compiler/pinline.pas svneol=native#text/plain
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compiler/pmodules.pas svneol=native#text/plain
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compiler/powerpc/aasmcpu.pas svneol=native#text/plain
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compiler/powerpc/agppcgas.pas svneol=native#text/plain
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compiler/powerpc/agppcmpw.pas svneol=native#text/plain
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compiler/powerpc/aoptcpu.pas svneol=native#text/plain
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@ -332,7 +331,6 @@ compiler/powerpc/rppcsri.inc svneol=native#text/plain
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compiler/powerpc/rppcstab.inc svneol=native#text/plain
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compiler/powerpc/rppcstd.inc svneol=native#text/plain
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compiler/powerpc/rppcsup.inc svneol=native#text/plain
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compiler/powerpc64/aasmcpu.pas svneol=native#text/plain
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compiler/powerpc64/agppcgas.pas svneol=native#text/plain
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compiler/powerpc64/aoptcpu.pas svneol=native#text/plain
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compiler/powerpc64/aoptcpub.pas svneol=native#text/plain
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@ -378,6 +376,7 @@ compiler/ppc.cfg -text
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compiler/ppc.conf -text
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compiler/ppc.dof -text
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compiler/ppc.dpr -text
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compiler/ppcgen/aasmcpu.pas svneol=native#text/plain
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compiler/ppcgen/cgppc.pas svneol=native#text/plain
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compiler/ppcgen/ngppcadd.pas svneol=native#text/plain
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compiler/ppheap.pas svneol=native#text/plain
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@ -1,554 +0,0 @@
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{
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Copyright (c) 1999-2002 by Jonas Maebe
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Contains the assembler object for the PowerPC64. Heavily based on code
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from the PowerPC platform
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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****************************************************************************
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}
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unit aasmcpu;
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{$I fpcdefs.inc}
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interface
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uses
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globtype, verbose,
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aasmbase, aasmtai,aasmdata,
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cpubase, cgbase, cgutils;
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const
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{ "mov reg,reg" source operand number }
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O_MOV_SOURCE = 1;
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{ "mov reg,reg" source operand number }
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O_MOV_DEST = 0;
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type
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taicpu = class(tai_cpu_abstract)
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constructor op_none(op: tasmop);
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constructor op_reg(op: tasmop; _op1: tregister);
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constructor op_const(op: tasmop; _op1: aint);
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constructor op_reg_reg(op: tasmop; _op1, _op2: tregister);
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constructor op_reg_ref(op: tasmop; _op1: tregister; const _op2: treference);
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constructor op_reg_const(op: tasmop; _op1: tregister; _op2: aint);
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constructor op_const_reg(op: tasmop; _op1: aint; _op2: tregister);
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constructor op_const_const(op: tasmop; _op1, _op2: aint);
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constructor op_reg_reg_const_const(op: tasmop; _op1, _op2: tregister; _op3,
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_op4: aint);
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constructor op_reg_reg_reg(op: tasmop; _op1, _op2, _op3: tregister);
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constructor op_reg_reg_const(op: tasmop; _op1, _op2: tregister; _op3: aint);
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constructor op_reg_reg_sym_ofs(op: tasmop; _op1, _op2: tregister; _op3:
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tasmsymbol; _op3ofs: aint);
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constructor op_reg_reg_ref(op: tasmop; _op1, _op2: tregister; const _op3:
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treference);
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constructor op_const_reg_reg(op: tasmop; _op1: aint; _op2, _op3: tregister);
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constructor op_const_reg_const(op: tasmop; _op1: aint; _op2: tregister;
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_op3: aint);
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constructor op_const_const_const(op: tasmop; _op1: aint; _op2: aint; _op3:
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aint);
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constructor op_reg_reg_reg_reg(op: tasmop; _op1, _op2, _op3, _op4:
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tregister);
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constructor op_reg_bool_reg_reg(op: tasmop; _op1: tregister; _op2: boolean;
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_op3, _op4: tregister);
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constructor op_reg_bool_reg_const(op: tasmop; _op1: tregister; _op2:
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boolean; _op3: tregister; _op4: aint);
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constructor op_reg_reg_reg_const_const(op: tasmop; _op1, _op2, _op3:
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tregister; _op4, _op5: aint);
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constructor op_reg_reg_const_const_const(op: tasmop; _op1, _op2: tregister;
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_op3, _op4, _op5: aint);
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{ this is for Jmp instructions }
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constructor op_cond_sym(op: tasmop; cond: TAsmCond; _op1: tasmsymbol);
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constructor op_const_const_sym(op: tasmop; _op1, _op2: aint; _op3:
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tasmsymbol);
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constructor op_sym(op: tasmop; _op1: tasmsymbol);
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constructor op_sym_ofs(op: tasmop; _op1: tasmsymbol; _op1ofs: aint);
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constructor op_reg_sym_ofs(op: tasmop; _op1: tregister; _op2: tasmsymbol;
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_op2ofs: aint);
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constructor op_sym_ofs_ref(op: tasmop; _op1: tasmsymbol; _op1ofs: aint; const
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_op2: treference);
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procedure loadbool(opidx: aint; _b: boolean);
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function is_same_reg_move(regtype: Tregistertype): boolean; override;
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{ register spilling code }
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function spilling_get_operation_type(opnr: longint): topertype;override;
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function spilling_get_operation_type_ref(opnr: longint; reg: tregister): topertype;override;
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end;
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tai_align = class(tai_align_abstract)
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{ nothing to add }
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end;
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procedure InitAsm;
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procedure DoneAsm;
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function spilling_create_load(const ref: treference; r: tregister): tai;
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function spilling_create_store(r: tregister; const ref: treference): tai;
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procedure fixup_jmps(list: TAsmList);
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implementation
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uses cutils, cclasses;
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{*****************************************************************************
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taicpu Constructors
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*****************************************************************************}
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procedure taicpu.loadbool(opidx: aint; _b: boolean);
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begin
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if opidx >= ops then
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ops := opidx + 1;
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with oper[opidx]^ do
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begin
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if typ = top_ref then
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dispose(ref);
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b := _b;
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typ := top_bool;
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end;
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end;
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constructor taicpu.op_none(op: tasmop);
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begin
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inherited create(op);
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end;
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constructor taicpu.op_reg(op: tasmop; _op1: tregister);
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begin
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inherited create(op);
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ops := 1;
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loadreg(0, _op1);
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end;
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constructor taicpu.op_const(op: tasmop; _op1: aint);
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begin
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inherited create(op);
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ops := 1;
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loadconst(0, _op1);
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end;
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constructor taicpu.op_reg_reg_const_const(op: tasmop; _op1, _op2: tregister;
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_op3, _op4: aint);
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begin
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inherited create(op);
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ops := 4;
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loadreg(0, _op1);
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loadreg(1, _op2);
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loadconst(2, _op3);
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loadconst(3, _op4);
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end;
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constructor taicpu.op_reg_reg(op: tasmop; _op1, _op2: tregister);
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begin
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inherited create(op);
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ops := 2;
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loadreg(0, _op1);
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loadreg(1, _op2);
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end;
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constructor taicpu.op_reg_const(op: tasmop; _op1: tregister; _op2: aint);
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begin
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inherited create(op);
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ops := 2;
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loadreg(0, _op1);
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loadconst(1, _op2);
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end;
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constructor taicpu.op_const_reg(op: tasmop; _op1: aint; _op2: tregister);
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begin
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inherited create(op);
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ops := 2;
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loadconst(0, _op1);
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loadreg(1, _op2);
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end;
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constructor taicpu.op_reg_ref(op: tasmop; _op1: tregister; const _op2:
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treference);
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begin
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inherited create(op);
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ops := 2;
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loadreg(0, _op1);
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loadref(1, _op2);
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end;
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constructor taicpu.op_const_const(op: tasmop; _op1, _op2: aint);
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begin
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inherited create(op);
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ops := 2;
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loadconst(0, _op1);
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loadconst(1, _op2);
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end;
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constructor taicpu.op_reg_reg_reg(op: tasmop; _op1, _op2, _op3: tregister);
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begin
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inherited create(op);
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ops := 3;
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loadreg(0, _op1);
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loadreg(1, _op2);
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loadreg(2, _op3);
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end;
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constructor taicpu.op_reg_reg_const(op: tasmop; _op1, _op2: tregister; _op3:
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aint);
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begin
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inherited create(op);
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ops := 3;
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loadreg(0, _op1);
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loadreg(1, _op2);
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loadconst(2, _op3);
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end;
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constructor taicpu.op_reg_reg_sym_ofs(op: tasmop; _op1, _op2: tregister; _op3:
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tasmsymbol; _op3ofs: aint);
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begin
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inherited create(op);
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ops := 3;
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loadreg(0, _op1);
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loadreg(1, _op2);
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loadsymbol(0, _op3, _op3ofs);
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end;
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constructor taicpu.op_reg_reg_ref(op: tasmop; _op1, _op2: tregister; const _op3:
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treference);
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begin
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inherited create(op);
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ops := 3;
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loadreg(0, _op1);
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loadreg(1, _op2);
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loadref(2, _op3);
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end;
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constructor taicpu.op_const_reg_reg(op: tasmop; _op1: aint; _op2, _op3:
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tregister);
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begin
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inherited create(op);
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ops := 3;
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loadconst(0, _op1);
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loadreg(1, _op2);
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loadreg(2, _op3);
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end;
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constructor taicpu.op_const_reg_const(op: tasmop; _op1: aint; _op2: tregister;
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_op3: aint);
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begin
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inherited create(op);
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ops := 3;
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loadconst(0, _op1);
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loadreg(1, _op2);
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loadconst(2, _op3);
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end;
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constructor taicpu.op_const_const_const(op: tasmop; _op1: aint; _op2: aint;
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_op3: aint);
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begin
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inherited create(op);
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ops := 3;
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loadconst(0, _op1);
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loadconst(1, _op2);
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loadconst(2, _op3);
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end;
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constructor taicpu.op_reg_reg_reg_reg(op: tasmop; _op1, _op2, _op3, _op4:
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tregister);
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begin
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inherited create(op);
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ops := 4;
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loadreg(0, _op1);
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loadreg(1, _op2);
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loadreg(2, _op3);
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loadreg(3, _op4);
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end;
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constructor taicpu.op_reg_bool_reg_reg(op: tasmop; _op1: tregister; _op2:
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boolean; _op3, _op4: tregister);
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begin
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inherited create(op);
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ops := 4;
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loadreg(0, _op1);
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loadbool(1, _op2);
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loadreg(2, _op3);
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loadreg(3, _op4);
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end;
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constructor taicpu.op_reg_bool_reg_const(op: tasmop; _op1: tregister; _op2:
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boolean; _op3: tregister; _op4: aint);
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begin
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inherited create(op);
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ops := 4;
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loadreg(0, _op1);
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loadbool(0, _op2);
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loadreg(0, _op3);
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loadconst(0, cardinal(_op4));
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end;
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constructor taicpu.op_reg_reg_reg_const_const(op: tasmop; _op1, _op2, _op3:
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tregister; _op4, _op5: aint);
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begin
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inherited create(op);
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ops := 5;
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loadreg(0, _op1);
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loadreg(1, _op2);
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loadreg(2, _op3);
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loadconst(3, cardinal(_op4));
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loadconst(4, cardinal(_op5));
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end;
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constructor taicpu.op_reg_reg_const_const_const(op: tasmop; _op1, _op2:
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tregister; _op3, _op4, _op5: aint);
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begin
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inherited create(op);
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ops := 5;
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loadreg(0, _op1);
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loadreg(1, _op2);
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loadconst(2, _op3);
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loadconst(3, _op4);
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loadconst(4, _op5);
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end;
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constructor taicpu.op_cond_sym(op: tasmop; cond: TAsmCond; _op1: tasmsymbol);
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begin
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inherited create(op);
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condition := cond;
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ops := 1;
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loadsymbol(0, _op1, 0);
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end;
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constructor taicpu.op_const_const_sym(op: tasmop; _op1, _op2: aint; _op3:
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tasmsymbol);
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begin
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inherited create(op);
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ops := 3;
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loadconst(0, _op1);
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loadconst(1, _op2);
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loadsymbol(2, _op3, 0);
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end;
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constructor taicpu.op_sym(op: tasmop; _op1: tasmsymbol);
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begin
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inherited create(op);
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ops := 1;
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loadsymbol(0, _op1, 0);
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end;
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constructor taicpu.op_sym_ofs(op: tasmop; _op1: tasmsymbol; _op1ofs: aint);
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begin
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inherited create(op);
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ops := 1;
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loadsymbol(0, _op1, _op1ofs);
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end;
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constructor taicpu.op_reg_sym_ofs(op: tasmop; _op1: tregister; _op2: tasmsymbol;
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_op2ofs: aint);
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begin
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inherited create(op);
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ops := 2;
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loadreg(0, _op1);
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loadsymbol(1, _op2, _op2ofs);
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end;
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constructor taicpu.op_sym_ofs_ref(op: tasmop; _op1: tasmsymbol; _op1ofs: aint;
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const _op2: treference);
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begin
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inherited create(op);
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ops := 2;
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loadsymbol(0, _op1, _op1ofs);
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loadref(1, _op2);
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end;
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{ ****************************** newra stuff *************************** }
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function taicpu.is_same_reg_move(regtype: Tregistertype):boolean;
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begin
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result :=
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(((opcode=A_MR) and
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(regtype = R_INTREGISTER)) or
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((opcode = A_FMR) and
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(regtype = R_FPUREGISTER))) and
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{ these opcodes can only have registers as operands }
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(oper[0]^.reg=oper[1]^.reg);
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end;
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function taicpu.spilling_get_operation_type(opnr: longint): topertype;
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begin
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result := operand_read;
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case opcode of
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A_STMW,A_LMW:
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internalerror(2005021805);
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A_STBU, A_STBUX, A_STHU, A_STHUX,
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A_STWU, A_STWUX, A_STDU, A_STDUX,
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A_STFSU, A_STFSUX, A_STFDU, A_STFDUX,
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A_STB, A_STBX, A_STH, A_STHX,
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A_STW, A_STWX, A_STD, A_STDX,
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A_STFS, A_STFSX, A_STFD, A_STFDX, A_STFIWX, A_STHBRX, A_STWBRX, A_STWCX_, A_STDCX_,
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A_CMP, A_CMPI, A_CMPL, A_CMPLI, A_CMPD, A_CMPDI, A_CMPLD, A_CMPLDI,
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A_DCBA, A_DCBI, A_DCBST, A_DCBT, A_DCBTST, A_DCBZ,
|
||||
A_ECOWX, A_FCMPO, A_FCMPU, A_MTMSR, A_TLBIE, A_TW, A_TWI, A_MFXER,
|
||||
A_CMPWI, A_CMPW, A_CMPLWI, A_CMPLW, A_MT, A_MTLR, A_MTCTR:;
|
||||
A_RLWIMI, A_RLWIMI_, A_INSRDI, A_INSRDI_, A_RLDIMI:
|
||||
if opnr = 0 then
|
||||
result := operand_readwrite;
|
||||
else
|
||||
if opnr = 0 then
|
||||
result := operand_write;
|
||||
end;
|
||||
end;
|
||||
|
||||
function taicpu.spilling_get_operation_type_ref(opnr: longint; reg: tregister): topertype;
|
||||
begin
|
||||
result := operand_read;
|
||||
case opcode of
|
||||
A_STBU, A_STBUX, A_STHU, A_STHUX, A_STWU, A_STWUX, A_STDU, A_STDUX,
|
||||
A_STFSU, A_STFSUX, A_STFDU, A_STFDUX:
|
||||
if (oper[opnr]^.ref^.base = reg) then
|
||||
result := operand_readwrite;
|
||||
end;
|
||||
end;
|
||||
|
||||
|
||||
function spilling_create_load(const ref: treference; r: tregister): tai;
|
||||
begin
|
||||
case getregtype(r) of
|
||||
R_INTREGISTER:
|
||||
result:=taicpu.op_reg_ref(A_LD,r,ref);
|
||||
R_FPUREGISTER:
|
||||
result:=taicpu.op_reg_ref(A_LFD,r,ref);
|
||||
else
|
||||
internalerror(2005123101);
|
||||
end;
|
||||
end;
|
||||
|
||||
function spilling_create_store(r: tregister; const ref: treference): tai;
|
||||
begin
|
||||
case getregtype(r) of
|
||||
R_INTREGISTER:
|
||||
result:=taicpu.op_reg_ref(A_STD,r,ref);
|
||||
R_FPUREGISTER:
|
||||
result:=taicpu.op_reg_ref(A_STFD,r,ref);
|
||||
else
|
||||
internalerror(2005123102);
|
||||
end;
|
||||
end;
|
||||
|
||||
procedure InitAsm;
|
||||
begin
|
||||
end;
|
||||
|
||||
procedure DoneAsm;
|
||||
begin
|
||||
end;
|
||||
|
||||
procedure fixup_jmps(list: TAsmList);
|
||||
var
|
||||
p: tai;
|
||||
newjmp: taicpu;
|
||||
labelpositions: TFPList;
|
||||
instrpos: ptrint;
|
||||
l: tasmlabel;
|
||||
inserted_something: boolean;
|
||||
begin
|
||||
// if certainly not enough instructions to cause an overflow, don't bother
|
||||
if (list.count <= (high(smallint) div 4)) then
|
||||
exit;
|
||||
labelpositions := TFPList.create;
|
||||
p := tai(list.first);
|
||||
instrpos := 1;
|
||||
// record label positions
|
||||
while assigned(p) do
|
||||
begin
|
||||
if p.typ = ait_label then
|
||||
begin
|
||||
if (tai_label(p).labsym.labelnr >= labelpositions.count) then
|
||||
labelpositions.count := tai_label(p).labsym.labelnr * 2;
|
||||
labelpositions[tai_label(p).labsym.labelnr] := pointer(instrpos);
|
||||
end;
|
||||
if p.typ = ait_instruction then
|
||||
inc(instrpos);
|
||||
p := tai(p.next);
|
||||
end;
|
||||
|
||||
// check and fix distances
|
||||
repeat
|
||||
inserted_something := false;
|
||||
p := tai(list.first);
|
||||
instrpos := 1;
|
||||
while assigned(p) do
|
||||
begin
|
||||
case p.typ of
|
||||
ait_label:
|
||||
// update labelposition in case it changed due to insertion
|
||||
// of jumps
|
||||
begin
|
||||
// can happen because of newly inserted labels
|
||||
if (tai_label(p).labsym.labelnr > labelpositions.count) then
|
||||
labelpositions.count := tai_label(p).labsym.labelnr * 2;
|
||||
labelpositions[tai_label(p).labsym.labelnr] := pointer(instrpos);
|
||||
end;
|
||||
ait_instruction:
|
||||
begin
|
||||
inc(instrpos);
|
||||
case taicpu(p).opcode of
|
||||
A_BC:
|
||||
if (taicpu(p).oper[0]^.typ = top_ref) and
|
||||
assigned(taicpu(p).oper[0]^.ref^.symbol) and
|
||||
(taicpu(p).oper[0]^.ref^.symbol is tasmlabel) and
|
||||
(labelpositions[tasmlabel(taicpu(p).oper[0]^.ref^.symbol).labelnr] <> NIL) and
|
||||
(ptruint(abs(ptrint(labelpositions[tasmlabel(taicpu(p).oper[0]^.ref^.symbol).labelnr]-instrpos)) - (low(smallint) div 4)) > ptruint((high(smallint) - low(smallint)) div 4)) then
|
||||
begin
|
||||
// add a new label after this jump
|
||||
current_asmdata.getjumplabel(l);
|
||||
list.insertafter(tai_label.create(l),p);
|
||||
// add a new unconditional jump between this jump and the label
|
||||
newjmp := taicpu.op_sym(A_B,taicpu(p).oper[0]^.ref^.symbol);
|
||||
newjmp.is_jmp := true;
|
||||
newjmp.fileinfo := taicpu(p).fileinfo;
|
||||
list.insertafter(newjmp,p);
|
||||
inc(instrpos);
|
||||
// change the conditional jump to point to the newly inserted label
|
||||
tasmlabel(taicpu(p).oper[0]^.ref^.symbol).decrefs;
|
||||
taicpu(p).oper[0]^.ref^.symbol := l;
|
||||
l.increfs;
|
||||
// and invert its condition code
|
||||
taicpu(p).condition := inverse_cond(taicpu(p).condition);
|
||||
// we inserted an instruction, so will have to check everything again
|
||||
inserted_something := true;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
p := tai(p.next);
|
||||
end;
|
||||
until not inserted_something;
|
||||
labelpositions.free;
|
||||
end;
|
||||
|
||||
begin
|
||||
cai_align := tai_align;
|
||||
cai_cpu := taicpu;
|
||||
end.
|
||||
|
Loading…
Reference in New Issue
Block a user