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* three operand shl for shifting by 2, 4 or 8 can be simulated by lea

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git-svn-id: trunk@40337 -
This commit is contained in:
florian 2018-11-17 15:08:22 +00:00
parent bee9421f2a
commit 6dbde11f5a
1 changed files with 8 additions and 0 deletions
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8
compiler/x86/cgx86.pas
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@ -2080,6 +2080,14 @@ unit cgx86;
reference_reset_base(href,src,al,ctempposinvalid,0,[]); reference_reset_base(href,src,al,ctempposinvalid,0,[]);
list.concat(taicpu.op_ref_reg(A_LEA,TCgSize2OpSize[size],href,dst)); list.concat(taicpu.op_ref_reg(A_LEA,TCgSize2OpSize[size],href,dst));
end end
else if (op=OP_SHL) and (size in [OS_32,OS_S32,OS_64,OS_S64]) and
(int64(a)>=1) and (int64(a)<=3) then
begin
reference_reset_base(href,NR_NO,0,ctempposinvalid,0,[]);
href.index:=src;
href.scalefactor:=1 shl longint(a);
list.concat(taicpu.op_ref_reg(A_LEA,TCgSize2OpSize[size],href,dst));
end
else if (op=OP_SUB) and else if (op=OP_SUB) and
((size in [OS_32,OS_S32]) or ((size in [OS_32,OS_S32]) or
{ lea supports only 32 bit signed displacments } { lea supports only 32 bit signed displacments }