diff --git a/.gitattributes b/.gitattributes
index 9e3b10d4a6..bfc0b576b7 100644
--- a/.gitattributes
+++ b/.gitattributes
@@ -12934,6 +12934,7 @@ tests/webtbs/tw2307.pp svneol=native#text/plain
 tests/webtbs/tw2311.pp svneol=native#text/plain
 tests/webtbs/tw2317.pp svneol=native#text/plain
 tests/webtbs/tw2318.pp svneol=native#text/plain
+tests/webtbs/tw23185.pp svneol=native#text/pascal
 tests/webtbs/tw2318b.pp svneol=native#text/plain
 tests/webtbs/tw2323.pp svneol=native#text/plain
 tests/webtbs/tw2328.pp svneol=native#text/plain
diff --git a/compiler/arm/armreg.dat b/compiler/arm/armreg.dat
index b299f53fed..b7d264f1ed 100644
--- a/compiler/arm/armreg.dat
+++ b/compiler/arm/armreg.dat
@@ -129,4 +129,20 @@ CR13,$05,$00,$11,cr13,0,0
 CR14,$05,$00,$12,cr14,0,0
 CR15,$05,$00,$13,cr15,0,0
 ; coprocessors
-p15,$05,$00,$14,p15,0,0
\ No newline at end of file
+p15,$05,$00,$14,p15,0,0
+; Cortex-M3 special registers
+APSR,$05,$00,$15,apsr,0,0
+IPSR,$05,$00,$16,ipsr,0,0
+EPSR,$05,$00,$17,epsr,0,0
+IEPSR,$05,$00,$18,iepsr,0,0
+IAPSR,$05,$00,$19,iapsr,0,0
+EAPSR,$05,$00,$1A,eapsr,0,0
+PSR,$05,$00,$1B,psr,0,0
+MSP,$05,$00,$1C,msp,0,0
+PSP,$05,$00,$1D,psp,0,0
+PRIMASK,$05,$00,$1E,primask,0,0
+BASEPRI,$05,$00,$1F,basepri,0,0
+BASEPRI_MAX,$05,$00,$20,basepri_max,0,0
+FAULTMASK,$05,$00,$21,faultmask,0,0
+CONTROL,$05,$00,$22,control,0,0
+
diff --git a/compiler/arm/rarmcon.inc b/compiler/arm/rarmcon.inc
index 233388134b..3d5cb5e7f4 100644
--- a/compiler/arm/rarmcon.inc
+++ b/compiler/arm/rarmcon.inc
@@ -109,3 +109,17 @@ NR_CR13 = tregister($05000011);
 NR_CR14 = tregister($05000012);
 NR_CR15 = tregister($05000013);
 NR_p15 = tregister($05000014);
+NR_APSR = tregister($05000015);
+NR_IPSR = tregister($05000016);
+NR_EPSR = tregister($05000017);
+NR_IEPSR = tregister($05000018);
+NR_IAPSR = tregister($05000019);
+NR_EAPSR = tregister($0500001A);
+NR_PSR = tregister($0500001B);
+NR_MSP = tregister($0500001C);
+NR_PSP = tregister($0500001D);
+NR_PRIMASK = tregister($0500001E);
+NR_BASEPRI = tregister($0500001F);
+NR_BASEPRI_MAX = tregister($05000020);
+NR_FAULTMASK = tregister($05000021);
+NR_CONTROL = tregister($05000022);
diff --git a/compiler/arm/rarmdwa.inc b/compiler/arm/rarmdwa.inc
index 5ae6b1171b..624996d855 100644
--- a/compiler/arm/rarmdwa.inc
+++ b/compiler/arm/rarmdwa.inc
@@ -108,4 +108,18 @@
 0,
 0,
 0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
 0
diff --git a/compiler/arm/rarmnor.inc b/compiler/arm/rarmnor.inc
index d0016e5182..5b7bb114ef 100644
--- a/compiler/arm/rarmnor.inc
+++ b/compiler/arm/rarmnor.inc
@@ -1,2 +1,2 @@
 { don't edit, this file is generated from armreg.dat }
-110
+124
diff --git a/compiler/arm/rarmnum.inc b/compiler/arm/rarmnum.inc
index 2652dd62d7..73d011e105 100644
--- a/compiler/arm/rarmnum.inc
+++ b/compiler/arm/rarmnum.inc
@@ -108,4 +108,18 @@ tregister($05000010),
 tregister($05000011),
 tregister($05000012),
 tregister($05000013),
-tregister($05000014)
+tregister($05000014),
+tregister($05000015),
+tregister($05000016),
+tregister($05000017),
+tregister($05000018),
+tregister($05000019),
+tregister($0500001A),
+tregister($0500001B),
+tregister($0500001C),
+tregister($0500001D),
+tregister($0500001E),
+tregister($0500001F),
+tregister($05000020),
+tregister($05000021),
+tregister($05000022)
diff --git a/compiler/arm/rarmrni.inc b/compiler/arm/rarmrni.inc
index ded12abb4b..be4c8f3524 100644
--- a/compiler/arm/rarmrni.inc
+++ b/compiler/arm/rarmrni.inc
@@ -108,4 +108,18 @@
 106,
 107,
 108,
-109
+109,
+110,
+111,
+112,
+113,
+114,
+115,
+116,
+117,
+118,
+119,
+120,
+121,
+122,
+123
diff --git a/compiler/arm/rarmsri.inc b/compiler/arm/rarmsri.inc
index 6fb9a7e803..6eca14213e 100644
--- a/compiler/arm/rarmsri.inc
+++ b/compiler/arm/rarmsri.inc
@@ -1,6 +1,10 @@
 { don't edit, this file is generated from armreg.dat }
 0,
+110,
 92,
+120,
+121,
+123,
 89,
 93,
 94,
@@ -50,6 +54,8 @@
 48,
 51,
 54,
+115,
+112,
 17,
 18,
 19,
@@ -58,8 +64,16 @@
 22,
 23,
 24,
+122,
 90,
+114,
+113,
+111,
+117,
 109,
+119,
+118,
+116,
 1,
 2,
 11,
diff --git a/compiler/arm/rarmsta.inc b/compiler/arm/rarmsta.inc
index 5880538e91..bce1177c07 100644
--- a/compiler/arm/rarmsta.inc
+++ b/compiler/arm/rarmsta.inc
@@ -108,4 +108,18 @@
 0,
 0,
 0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
+0,
 0
diff --git a/compiler/arm/rarmstd.inc b/compiler/arm/rarmstd.inc
index 4da248db35..4fed2df7ff 100644
--- a/compiler/arm/rarmstd.inc
+++ b/compiler/arm/rarmstd.inc
@@ -108,4 +108,18 @@
 'cr13',
 'cr14',
 'cr15',
-'p15'
+'p15',
+'apsr',
+'ipsr',
+'epsr',
+'iepsr',
+'iapsr',
+'eapsr',
+'psr',
+'msp',
+'psp',
+'primask',
+'basepri',
+'basepri_max',
+'faultmask',
+'control'
diff --git a/compiler/arm/rarmsup.inc b/compiler/arm/rarmsup.inc
index 2f2af5f5ca..285c1e09e9 100644
--- a/compiler/arm/rarmsup.inc
+++ b/compiler/arm/rarmsup.inc
@@ -109,3 +109,17 @@ RS_CR13 = $11;
 RS_CR14 = $12;
 RS_CR15 = $13;
 RS_p15 = $14;
+RS_APSR = $15;
+RS_IPSR = $16;
+RS_EPSR = $17;
+RS_IEPSR = $18;
+RS_IAPSR = $19;
+RS_EAPSR = $1A;
+RS_PSR = $1B;
+RS_MSP = $1C;
+RS_PSP = $1D;
+RS_PRIMASK = $1E;
+RS_BASEPRI = $1F;
+RS_BASEPRI_MAX = $20;
+RS_FAULTMASK = $21;
+RS_CONTROL = $22;
diff --git a/tests/webtbs/tw23185.pp b/tests/webtbs/tw23185.pp
new file mode 100644
index 0000000000..7788b5a042
--- /dev/null
+++ b/tests/webtbs/tw23185.pp
@@ -0,0 +1,9 @@
+{ %target=linux }
+{ %cpu=arm }
+{ %norun }
+{ %opt=-Cparmv7m }
+begin
+asm
+ mrs r0, psp
+end;
+end.