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* SPARC: reworked 64-bit comparisons so their result is always in flags. Comparisons are emitted as subtractions, sides are optionally swapped to avoid using Z flag (since it is not set correctly in multi-word subtraction). This generates significantly shorter code: when both sides are in registers it is just 3 instructions for equal/unequal and 2 instructions otherwise.
git-svn-id: trunk@26433 -
This commit is contained in:
sergei
parent
204d0ac90a
commit
720b9bf560
@ -42,6 +42,7 @@ interface
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procedure second_cmpordinal;override;
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procedure second_cmpordinal;override;
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procedure second_addordinal;override;
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procedure second_addordinal;override;
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public
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public
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function pass_1: tnode; override;
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function use_generic_mul32to64: boolean; override;
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function use_generic_mul32to64: boolean; override;
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end;
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end;
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@ -297,67 +298,40 @@ interface
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procedure tsparcaddnode.second_cmp64bit;
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procedure tsparcaddnode.second_cmp64bit;
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var
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var
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unsigned : boolean;
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unsigned : boolean;
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hreg1,hreg2: tregister;
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procedure firstjmp64bitcmp;
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procedure emit_compare(list:tasmlist; ls,rs:tnode);
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var
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var
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oldnodetype : tnodetype;
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lreg: tregister64;
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begin
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begin
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{ the jump the sequence is a little bit hairy }
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if (ls.location.loc=LOC_CONSTANT) then
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case nodetype of
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begin
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ltn,gtn:
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lreg.reghi:=NR_G0;
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lreg.reglo:=NR_G0;
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if lo(ls.location.value64)<>0 then
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begin
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begin
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cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrTrueLabel);
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lreg.reglo:=cg.GetIntRegister(list,OS_INT);
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{ cheat a little bit for the negative test }
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cg.a_load_const_reg(list,OS_INT,lo(ls.location.value64),lreg.reglo);
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toggleflag(nf_swapped);
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cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrFalseLabel);
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toggleflag(nf_swapped);
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end;
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end;
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lten,gten:
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if hi(ls.location.value64)<>0 then
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begin
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begin
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oldnodetype:=nodetype;
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lreg.reghi:=cg.GetIntRegister(list,OS_INT);
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if nodetype=lten then
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cg.a_load_const_reg(list,OS_INT,hi(ls.location.value64),lreg.reghi);
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nodetype:=ltn
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else
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nodetype:=gtn;
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cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrTrueLabel);
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{ cheat for the negative test }
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if nodetype=ltn then
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nodetype:=gtn
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else
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nodetype:=ltn;
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cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrFalseLabel);
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nodetype:=oldnodetype;
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end;
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end;
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equaln:
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end
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cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrFalseLabel);
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else
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unequaln:
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lreg:=ls.location.register64;
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cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrTrueLabel);
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end;
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end;
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procedure secondjmp64bitcmp;
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if (rs.location.loc=LOC_CONSTANT) then
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begin
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begin
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tcgsparc(cg).handle_reg_const_reg(list,A_SUBcc,lreg.reglo,lo(rs.location.value64),NR_G0);
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{ the jump the sequence is a little bit hairy }
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tcgsparc(cg).handle_reg_const_reg(list,A_SUBXcc,lreg.reghi,hi(rs.location.value64),NR_G0);
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case nodetype of
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end
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ltn,gtn,lten,gten:
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else
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begin
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begin
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{ the comparisaion of the low dword have to be }
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list.concat(taicpu.op_reg_reg_reg(A_SUBcc,lreg.reglo,rs.location.register64.reglo,NR_G0));
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{ always unsigned! }
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list.concat(taicpu.op_reg_reg_reg(A_SUBXcc,lreg.reghi,rs.location.register64.reghi,NR_G0));
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cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrTrueLabel);
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end;
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cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
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end;
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equaln:
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begin
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cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrFalseLabel);
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cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
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end;
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unequaln:
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begin
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cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrTrueLabel);
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cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
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end;
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end;
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end;
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end;
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begin
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begin
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@ -367,21 +341,65 @@ interface
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unsigned:=not(is_signed(left.resultdef)) or
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unsigned:=not(is_signed(left.resultdef)) or
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not(is_signed(right.resultdef));
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not(is_signed(right.resultdef));
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location_reset(location,LOC_JUMP,OS_NO);
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location_reset(location,LOC_FLAGS,OS_NO);
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if (right.location.loc<>LOC_CONSTANT) then
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if (nodetype in [equaln,unequaln]) then
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begin
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begin
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register64.reghi,right.location.register64.reghi));
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location.resflags:=getresflags(unsigned);
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firstjmp64bitcmp;
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if (right.location.loc=LOC_CONSTANT) then
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMP,left.location.register64.reglo,right.location.register64.reglo));
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begin
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secondjmp64bitcmp;
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if hi(right.location.value64)<>0 then
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begin
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hreg1:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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tcgsparc(cg).handle_reg_const_reg(current_asmdata.CurrAsmList,A_XOR,left.location.register64.reghi,hi(right.location.value64),hreg1);
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end
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else
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hreg1:=left.location.register64.reghi;
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if lo(right.location.value64)<>0 then
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begin
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hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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tcgsparc(cg).handle_reg_const_reg(current_asmdata.CurrAsmList,A_XOR,left.location.register64.reglo,lo(right.location.value64),hreg2);
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end
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else
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hreg2:=left.location.register64.reglo;
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end
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else
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begin
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hreg1:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_XOR,left.location.register64.reghi,right.location.register64.reghi,hreg1));
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_XOR,left.location.register64.reglo,right.location.register64.reglo,hreg2));
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end;
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ORcc,hreg1,hreg2,NR_G0));
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end
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end
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else
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else
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begin
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begin
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tcgsparc(cg).handle_reg_const_reg(current_asmdata.CurrAsmList,A_SUBcc,left.location.register64.reghi,hi(right.location.value64),NR_G0);
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{ undo possible swapped state }
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firstjmp64bitcmp;
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if (nf_swapped in flags) then
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tcgsparc(cg).handle_reg_const_reg(current_asmdata.CurrAsmList,A_SUBcc,left.location.register64.reglo,lo(right.location.value64),NR_G0);
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swapleftright;
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secondjmp64bitcmp;
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{ Subtracting sides sets N,V and C flags correctly, but not Z flag
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(which ends up depending only on upper dword). So don't use conditions
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that test Z flag:
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unsigned signed
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a < b => F_B F_L
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a >= b => F_AE F_GE
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a <= b => swap, F_AE F_GE
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a > b => swap, F_B F_L }
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if (nodetype in [ltn,gten]) then
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begin
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emit_compare(current_asmdata.CurrAsmList,left,right);
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location.resflags:=getresflags(unsigned);
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end
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else if (nodetype in [lten,gtn]) then
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begin
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emit_compare(current_asmdata.CurrAsmList,right,left);
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toggleflag(nf_swapped);
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location.resflags:=getresflags(unsigned);
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toggleflag(nf_swapped);
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end
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else
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InternalError(2014011001);
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end;
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end;
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end;
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end;
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@ -435,6 +453,18 @@ interface
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result:=false;
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result:=false;
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end;
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end;
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function tsparcaddnode.pass_1: tnode;
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begin
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result:=inherited pass_1;
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if not assigned(result) then
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begin
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if is_64bitint(left.resultdef) and
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(nodetype in [equaln,unequaln,ltn,gtn,lten,gten]) then
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expectloc:=LOC_FLAGS;
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end;
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end;
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begin
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begin
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caddnode:=tsparcaddnode;
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caddnode:=tsparcaddnode;
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end.
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end.
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