From 72daf3f556208778d53f644711db13c5b24b1e2a Mon Sep 17 00:00:00 2001
From: florian <florian@freepascal.org>
Date: Sat, 4 Jan 2025 14:58:31 +0100
Subject: [PATCH]   * RiscV64: optimize 32 bit shift instructions as well

---
 compiler/riscv/aoptcpurv.pas | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/compiler/riscv/aoptcpurv.pas b/compiler/riscv/aoptcpurv.pas
index f06d913edd..41fa851a35 100644
--- a/compiler/riscv/aoptcpurv.pas
+++ b/compiler/riscv/aoptcpurv.pas
@@ -680,12 +680,22 @@ implementation
               A_AND,
               A_OR,
               A_XOR,
+{$ifdef riscv64}
+              A_SLLW,
+              A_SRLW,
+              A_SRAW,
+{$endif riscv64}
               A_SLL,
               A_SRL,
               A_SRA,
               A_NEG,
               A_NOT:
                 result:=OptPass1OP(p);
+{$ifdef riscv64}
+              A_SRAIW,
+              A_SRLIW,
+              A_SLLIW,
+{$endif riscv64}
               A_SRAI,
               A_SRLI,
               A_SLLI: