mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-04-05 23:31:49 +02:00
Merge branch 'addsub-ref' into 'main'
Draft: [x86] Optimisations to ADD and SUB where references are concerned See merge request freepascal.org/fpc/source!134
This commit is contained in:
J. Gareth "Kit" Moreton
commit
737c96568b
@ -162,6 +162,8 @@ unit aoptx86;
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procedure RemoveLastDeallocForFuncRes(p : tai);
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function DoArithCombineOpt(var p : tai) : Boolean;
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function DoAddRefOpt(var p, hp1: tai; Reg: TRegister; Value: TCGInt): Boolean;
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function DoReverseAddRefOpt(var p: tai; Value: TCGInt): Boolean;
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function DoMovCmpMemOpt(var p : tai; const hp1: tai) : Boolean;
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function DoSETccLblRETOpt(var p: tai; const hp_label: tai_label) : Boolean;
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@ -6219,6 +6221,7 @@ unit aoptx86;
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else
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DebugMsg(SPeepholeOptimization + 'ADD; ADD/SUB -> ADD',p);
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RemoveInstruction(hp1);
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hp1 := nil; { This permits DoAddRefOpt to work in a single call }
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end;
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end
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else
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@ -6245,6 +6248,33 @@ unit aoptx86;
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end;
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end;
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if DoArithCombineOpt(p) then
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begin
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Result:=true;
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Exit;
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end;
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{ Change:
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add $x,%reg1
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...
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??? #(%reg2,%reg1,y) (Instructions with a reference)
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(dealloc %reg1)
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To:
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??? x*y+#(%reg2,%reg1,y)
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(Do similar when %reg1 appears in (or also in) the index)
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}
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if (
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{ Save calling GetNextInstructionUsingReg again }
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Assigned(hp1) or
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GetNextInstructionUsingReg(p,hp1, ActiveReg)
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) and DoAddRefOpt(p, hp1, ActiveReg, taicpu(p).oper[0]^.val) then
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begin
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Result := True;
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Exit;
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end;
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if DoArithCombineOpt(p) then
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Result:=true;
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end;
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@ -6760,6 +6790,196 @@ unit aoptx86;
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end;
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function TX86AsmOptimizer.DoAddRefOpt(var p, hp1: tai; Reg: TRegister; Value: TCGInt): Boolean;
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var
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ThisConst: TCGInt;
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X: Integer;
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NewAssign, RegUsed: Boolean;
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hp2, p_next: tai;
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begin
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Result := False;
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if hp1.typ <> ait_instruction then
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Exit;
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{ If thef flags are in use, do not make any changes }
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if RegInUsedRegs(NR_DEFAULTFLAGS, UsedRegs) then
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Exit;
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NewAssign :=
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{ MOV is a common case and faster to check than calling MatchInstruction }
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(
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(taicpu(hp1).opcode = A_MOV) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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SuperRegistersEqual(taicpu(hp1).oper[1]^.reg, Reg)
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) or
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(
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MatchInstruction(hp1, A_MOVZX, A_MOVSX{$ifdef x86_64}, A_MOVSXD{$endif x86_64}, []) and
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SuperRegistersEqual(taicpu(hp1).oper[1]^.reg, Reg)
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) or
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RegLoadedWithNewValue(Reg, hp1);
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if not NewAssign and
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RegModifiedByInstruction(Reg, hp1) then
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Exit;
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TransferUsedRegs(TmpUsedRegs);
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if not GetNextInstruction(p, p_next) then
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{ We should have hit hp1 at least }
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InternalError(2022010801);
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UpdateUsedRegs(TmpUsedRegs, tai(p_next.Next));
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if p_next <> hp1 then
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begin
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hp2 := p_next;
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repeat
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UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
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until not GetNextInstruction(hp2, hp2) or (hp2 = hp1);
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end;
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RegUsed := RegUsedAfterInstruction(Reg, hp1, TmpUsedRegs);
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{ If the register is used afterwards, we have to take some precautions }
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if RegUsed and RegInInstruction(NR_DEFAULTFLAGS, hp1) then
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{ Swapping the instructions will scramble the flags; e.g.
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subq $1,%rax
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cmpb $10,(%rax)
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Swapping them will cause the flags to depend on SUB instead
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}
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Exit;
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for X := 0 to taicpu(hp1).ops - 1 do
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if taicpu(hp1).oper[X]^.typ = top_ref then
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begin
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ThisConst := taicpu(hp1).oper[X]^.ref^.offset;
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if (taicpu(hp1).oper[X]^.ref^.base = Reg) then
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begin
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Inc(ThisConst, Value);
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Result := True;
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end;
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if (taicpu(hp1).oper[X]^.ref^.index = Reg) then
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begin
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Inc(ThisConst, Value * max(taicpu(hp1).oper[X]^.ref^.scalefactor, 1));
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Result := True;
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end;
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if Result then
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if (ThisConst > $7FFFFFFF) or (ThisConst < -2147483648) then
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{ Overflow - abort }
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Result := False
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else if (cs_opt_size in current_settings.optimizerswitches) and
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not NewAssign and RegUsed and
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(ThisConst <> 0) then
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{ Will increase code size }
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Result := False
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else
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taicpu(hp1).oper[X]^.ref^.offset := ThisConst;
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Break;
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end;
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if Result then
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begin
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if not NewAssign and RegUsed then
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begin
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DebugMsg(SPeepholeOptimization + 'Merged arithmetic instruction into following reference (OpRef2RefOp)', p);
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UpdateUsedRegs(tai(p.Next));
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Asml.Remove(p);
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Asml.InsertAfter(p, hp1);
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p := p_next;
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end
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else
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begin
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DebugMsg(SPeepholeOptimization + 'Merged arithmetic instruction into following reference (OpRef2Ref)', p);
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if (cs_opt_level3 in current_settings.optimizerswitches) then
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RemoveCurrentp(p)
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else
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RemoveCurrentp(p, p_next);
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end;
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Exit;
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end;
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end;
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function TX86AsmOptimizer.DoReverseAddRefOpt(var p: tai; Value: TCGInt): Boolean;
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var
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CurrentRef: PReference;
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OtherRegister: TRegister;
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X: Integer;
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hp1, hp2: tai;
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begin
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{ Assume that p has been checked and confirmed to be of the form
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"ADD/SUB const,%reg" }
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Result := False;
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if GetLastInstruction(p, hp1) and (hp1.typ = ait_instruction) and
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{ Make sure this instruction doesn't also modify the register used in
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the ADD/SUB instruction }
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not RegModifiedByInstruction(taicpu(p).oper[1]^.reg, hp1) then
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begin
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{ Find the reference }
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for X := 0 to taicpu(Hp1).ops - 1 do
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if (taicpu(hp1).oper[X]^.typ = top_ref) then
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begin
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{ Locally store the pointer to the reference }
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CurrentRef := taicpu(hp1).oper[X]^.ref;
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if
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{ Only references of the form x(%reg1,%reg2,scale) can be
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optimised here }
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(CurrentRef^.refaddr <> addr_no) or
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not RegInRef(taicpu(p).oper[1]^.reg, CurrentRef^) then
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Exit;
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{ Account for the scale factor on the value }
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if SuperRegistersEqual(taicpu(p).oper[1]^.reg, CurrentRef^.index) then
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begin
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OtherRegister := CurrentRef^.base;
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if SuperRegistersEqual(taicpu(p).oper[1]^.reg, CurrentRef^.base) then
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Inc(Value, Value * max(CurrentRef^.scalefactor, 1))
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else
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Value := Value * max(CurrentRef^.scalefactor, 1);
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end
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else
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OtherRegister := CurrentRef^.index;
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if (OtherRegister <> NR_NO) and
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(
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{ If we can't set the offset to zero, this is wasted effort }
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(CurrentRef^.offset = Value) or
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{ But maybe not if we can reduce the byte count }
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(
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((CurrentRef^.offset > 127) or (CurrentRef^.offset < -128)) and
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((CurrentRef^.offset - Value) >= -128) and
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((CurrentRef^.offset - Value) <= 127)
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)
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)
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and GetLastInstruction(hp1, hp2) and
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{ Make sure there is a pipeline stall between hp2 and hp1,
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otherwise a saving won't be made }
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RegModifiedByInstruction(OtherRegister, hp2) then
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begin
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taicpu(hp1).oper[X]^.ref^.offset := 0;
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AsmL.Remove(hp1);
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AsmL.InsertAfter(hp1, p);
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{ In case OtherRegister got deallocated right after the reference }
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AllocRegBetween(OtherRegister, hp2, hp1, UsedRegs);
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DebugMsg(SPeepholeOptimization + 'Rearranged MOV; (ref); ADD/SUB to MOV; ADD/SUB; (ref) to remove offset and minimise cache pollution', hp2);
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{ Keep p as the current instruction }
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Result := True;
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end;
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end;
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end;
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end;
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function TX86AsmOptimizer.DoArithCombineOpt(var p: tai): Boolean;
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var
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hp1 : tai;
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@ -7311,6 +7531,7 @@ unit aoptx86;
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else
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DebugMsg(SPeepholeOptimization + 'SUB; ADD/SUB -> SUB',p);
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RemoveInstruction(hp1);
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hp1 := nil; { This permits DoAddRefOpt to work in a single call }
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end;
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end
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else
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@ -7370,7 +7591,32 @@ unit aoptx86;
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end;
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{$endif i386}
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if DoArithCombineOpt(p) then
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Result:=true;
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begin
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Result:=true;
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Exit;
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end;
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{ Change:
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sub $x,%reg1
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...
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??? #(%reg2,%reg1,y) (Instructions with a reference)
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(dealloc %reg1)
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To:
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??? #-x*y(%reg2,%reg1,y)
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(Do similar when %reg1 appears in (or also in) the index)
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}
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if (
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{ Save calling GetNextInstructionUsingReg again }
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Assigned(hp1) or
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GetNextInstructionUsingReg(p,hp1, ActiveReg)
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) and DoAddRefOpt(p, hp1, ActiveReg, -taicpu(p).oper[0]^.val) then
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begin
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Result := True;
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Exit;
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end;
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end;
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end;
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@ -16809,131 +17055,145 @@ unit aoptx86;
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begin
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Result := False;
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{ Change:
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add/sub 128,(dest)
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To:
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sub/add -128,(dest)
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This generaally takes fewer bytes to encode because -128 can be stored
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in a signed byte, whereas +128 cannot.
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}
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if (taicpu(p).opsize <> S_B) and MatchOperand(taicpu(p).oper[0]^, 128) then
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if taicpu(p).oper[0]^.typ = top_const then
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begin
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if taicpu(p).opcode = A_ADD then
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Opposite := A_SUB
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else
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Opposite := A_ADD;
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{ Be careful if the flags are in use, because the CF flag inverts
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when changing from ADD to SUB and vice versa }
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if RegInUsedRegs(NR_DEFAULTFLAGS, UsedRegs) and
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GetNextInstruction(p, hp1) then
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{ Sometimes, DoAddRefOpt makes an optimisation that doesn't
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improve code speed and only increases cache pollution. If these
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aren't cleared by other optimisations, rectify it here }
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if taicpu(p).oper[1]^.typ = top_reg then
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begin
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TransferUsedRegs(TmpUsedRegs);
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TmpUsedRegs[R_SPECIALREGISTER].Update(tai(p.Next), True);
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hp2 := hp1;
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{ Scan ahead to check if everything's safe }
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while Assigned(hp1) and RegInUsedRegs(NR_DEFAULTFLAGS, TmpUsedRegs) do
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begin
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if (hp1.typ <> ait_instruction) then
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{ Probably unsafe since the flags are still in use }
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Exit;
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if MatchInstruction(hp1, A_CALL, A_JMP, A_RET, []) then
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{ Stop searching at an unconditional jump }
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Break;
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if not
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(
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MatchInstruction(hp1, A_ADC, A_SBB, []) and
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(taicpu(hp1).oper[0]^.typ = top_const) { We need to be able to invert a constant }
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) and
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(taicpu(hp1).condition = C_None) and RegInInstruction(NR_DEFAULTFLAGS, hp1) then
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{ Instruction depends on FLAGS (and is not ADC or SBB); break out }
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Exit;
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UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
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TmpUsedRegs[R_SPECIALREGISTER].Update(tai(hp1.Next), True);
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{ Move to the next instruction }
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GetNextInstruction(hp1, hp1);
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end;
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while Assigned(hp2) and (hp2 <> hp1) do
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begin
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NewCond := C_None;
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case taicpu(hp2).condition of
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C_A, C_NBE:
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NewCond := C_BE;
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C_B, C_C, C_NAE:
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NewCond := C_AE;
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C_AE, C_NB, C_NC:
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NewCond := C_B;
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C_BE, C_NA:
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NewCond := C_A;
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else
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{ No change needed };
|
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end;
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if NewCond <> C_None then
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begin
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DebugMsg(SPeepholeOptimization + 'Condition changed from ' + cond2str[taicpu(hp2).condition] + ' to ' + cond2str[NewCond] +
|
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' to accommodate ' + debug_op2str(taicpu(p).opcode) + ' -> ' + debug_op2str(opposite) + ' above', hp2);
|
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|
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taicpu(hp2).condition := NewCond;
|
||||
end
|
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else
|
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if MatchInstruction(hp2, A_ADC, A_SBB, []) then
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begin
|
||||
{ Because of the flipping of the carry bit, to ensure
|
||||
the operation remains equivalent, ADC becomes SBB
|
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and vice versa, and the constant is not-inverted.
|
||||
|
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If multiple ADCs or SBBs appear in a row, each one
|
||||
changed causes the carry bit to invert, so they all
|
||||
need to be flipped }
|
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if taicpu(hp2).opcode = A_ADC then
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SecondOpposite := A_SBB
|
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else
|
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SecondOpposite := A_ADC;
|
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|
||||
if taicpu(hp2).oper[0]^.typ <> top_const then
|
||||
{ Should have broken out of this optimisation already }
|
||||
InternalError(2021112901);
|
||||
|
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DebugMsg(SPeepholeOptimization + debug_op2str(taicpu(hp2).opcode) + debug_opsize2str(taicpu(hp2).opsize) + ' $' + debug_tostr(taicpu(hp2).oper[0]^.val) + ',' + debug_operstr(taicpu(hp2).oper[1]^) + ' -> ' +
|
||||
debug_op2str(SecondOpposite) + debug_opsize2str(taicpu(hp2).opsize) + ' $' + debug_tostr(not taicpu(hp2).oper[0]^.val) + ',' + debug_operstr(taicpu(hp2).oper[1]^) + ' to accommodate inverted carry bit', hp2);
|
||||
|
||||
{ Bit-invert the constant (effectively equivalent to "-1 - val") }
|
||||
taicpu(hp2).opcode := SecondOpposite;
|
||||
taicpu(hp2).oper[0]^.val := not taicpu(hp2).oper[0]^.val;
|
||||
end;
|
||||
|
||||
{ Move to the next instruction }
|
||||
GetNextInstruction(hp2, hp2);
|
||||
end;
|
||||
|
||||
if (hp2 <> hp1) then
|
||||
InternalError(2021111501);
|
||||
if taicpu(p).opcode = A_ADD then
|
||||
Result := DoReverseAddRefOpt(p, taicpu(p).oper[0]^.val)
|
||||
else
|
||||
Result := DoReverseAddRefOpt(p, -taicpu(p).oper[0]^.val);
|
||||
end;
|
||||
|
||||
DebugMsg(SPeepholeOptimization + debug_op2str(taicpu(p).opcode) + debug_opsize2str(taicpu(p).opsize) + ' $128,' + debug_operstr(taicpu(p).oper[1]^) + ' changed to ' +
|
||||
debug_op2str(opposite) + debug_opsize2str(taicpu(p).opsize) + ' $-128,' + debug_operstr(taicpu(p).oper[1]^) + ' to reduce instruction size', p);
|
||||
{ Change:
|
||||
add/sub 128,(dest)
|
||||
|
||||
taicpu(p).opcode := Opposite;
|
||||
taicpu(p).oper[0]^.val := -128;
|
||||
To:
|
||||
sub/add -128,(dest)
|
||||
|
||||
{ No further optimisations can be made on this instruction, so move
|
||||
onto the next one to save time }
|
||||
p := tai(p.Next);
|
||||
UpdateUsedRegs(p);
|
||||
This generaally takes fewer bytes to encode because -128 can be stored
|
||||
in a signed byte, whereas +128 cannot.
|
||||
}
|
||||
if (taicpu(p).opsize <> S_B) and (taicpu(p).oper[0]^.val = 128) then
|
||||
begin
|
||||
if taicpu(p).opcode = A_ADD then
|
||||
Opposite := A_SUB
|
||||
else
|
||||
Opposite := A_ADD;
|
||||
|
||||
Result := True;
|
||||
Exit;
|
||||
{ Be careful if the flags are in use, because the CF flag inverts
|
||||
when changing from ADD to SUB and vice versa }
|
||||
if RegInUsedRegs(NR_DEFAULTFLAGS, UsedRegs) and
|
||||
GetNextInstruction(p, hp1) then
|
||||
begin
|
||||
TransferUsedRegs(TmpUsedRegs);
|
||||
TmpUsedRegs[R_SPECIALREGISTER].Update(tai(p.Next), True);
|
||||
|
||||
hp2 := hp1;
|
||||
|
||||
{ Scan ahead to check if everything's safe }
|
||||
while Assigned(hp1) and RegInUsedRegs(NR_DEFAULTFLAGS, TmpUsedRegs) do
|
||||
begin
|
||||
if (hp1.typ <> ait_instruction) then
|
||||
{ Probably unsafe since the flags are still in use }
|
||||
Exit;
|
||||
|
||||
if MatchInstruction(hp1, A_CALL, A_JMP, A_RET, []) then
|
||||
{ Stop searching at an unconditional jump }
|
||||
Break;
|
||||
|
||||
if not
|
||||
(
|
||||
MatchInstruction(hp1, A_ADC, A_SBB, []) and
|
||||
(taicpu(hp1).oper[0]^.typ = top_const) { We need to be able to invert a constant }
|
||||
) and
|
||||
(taicpu(hp1).condition = C_None) and RegInInstruction(NR_DEFAULTFLAGS, hp1) then
|
||||
{ Instruction depends on FLAGS (and is not ADC or SBB); break out }
|
||||
Exit;
|
||||
|
||||
UpdateUsedRegs(TmpUsedRegs, tai(p.Next));
|
||||
TmpUsedRegs[R_SPECIALREGISTER].Update(tai(hp1.Next), True);
|
||||
|
||||
{ Move to the next instruction }
|
||||
GetNextInstruction(hp1, hp1);
|
||||
end;
|
||||
|
||||
while Assigned(hp2) and (hp2 <> hp1) do
|
||||
begin
|
||||
NewCond := C_None;
|
||||
|
||||
case taicpu(hp2).condition of
|
||||
C_A, C_NBE:
|
||||
NewCond := C_BE;
|
||||
C_B, C_C, C_NAE:
|
||||
NewCond := C_AE;
|
||||
C_AE, C_NB, C_NC:
|
||||
NewCond := C_B;
|
||||
C_BE, C_NA:
|
||||
NewCond := C_A;
|
||||
else
|
||||
{ No change needed };
|
||||
end;
|
||||
|
||||
if NewCond <> C_None then
|
||||
begin
|
||||
DebugMsg(SPeepholeOptimization + 'Condition changed from ' + cond2str[taicpu(hp2).condition] + ' to ' + cond2str[NewCond] +
|
||||
' to accommodate ' + debug_op2str(taicpu(p).opcode) + ' -> ' + debug_op2str(opposite) + ' above', hp2);
|
||||
|
||||
taicpu(hp2).condition := NewCond;
|
||||
end
|
||||
else
|
||||
if MatchInstruction(hp2, A_ADC, A_SBB, []) then
|
||||
begin
|
||||
{ Because of the flipping of the carry bit, to ensure
|
||||
the operation remains equivalent, ADC becomes SBB
|
||||
and vice versa, and the constant is not-inverted.
|
||||
|
||||
If multiple ADCs or SBBs appear in a row, each one
|
||||
changed causes the carry bit to invert, so they all
|
||||
need to be flipped }
|
||||
if taicpu(hp2).opcode = A_ADC then
|
||||
SecondOpposite := A_SBB
|
||||
else
|
||||
SecondOpposite := A_ADC;
|
||||
|
||||
if taicpu(hp2).oper[0]^.typ <> top_const then
|
||||
{ Should have broken out of this optimisation already }
|
||||
InternalError(2021112901);
|
||||
|
||||
DebugMsg(SPeepholeOptimization + debug_op2str(taicpu(hp2).opcode) + debug_opsize2str(taicpu(hp2).opsize) + ' $' + debug_tostr(taicpu(hp2).oper[0]^.val) + ',' + debug_operstr(taicpu(hp2).oper[1]^) + ' -> ' +
|
||||
debug_op2str(SecondOpposite) + debug_opsize2str(taicpu(hp2).opsize) + ' $' + debug_tostr(not taicpu(hp2).oper[0]^.val) + ',' + debug_operstr(taicpu(hp2).oper[1]^) + ' to accommodate inverted carry bit', hp2);
|
||||
|
||||
{ Bit-invert the constant (effectively equivalent to "-1 - val") }
|
||||
taicpu(hp2).opcode := SecondOpposite;
|
||||
taicpu(hp2).oper[0]^.val := not taicpu(hp2).oper[0]^.val;
|
||||
end;
|
||||
|
||||
{ Move to the next instruction }
|
||||
GetNextInstruction(hp2, hp2);
|
||||
end;
|
||||
|
||||
if (hp2 <> hp1) then
|
||||
InternalError(2021111501);
|
||||
end;
|
||||
|
||||
DebugMsg(SPeepholeOptimization + debug_op2str(taicpu(p).opcode) + debug_opsize2str(taicpu(p).opsize) + ' $128,' + debug_operstr(taicpu(p).oper[1]^) + ' changed to ' +
|
||||
debug_op2str(opposite) + debug_opsize2str(taicpu(p).opsize) + ' $-128,' + debug_operstr(taicpu(p).oper[1]^) + ' to reduce instruction size', p);
|
||||
|
||||
taicpu(p).opcode := Opposite;
|
||||
taicpu(p).oper[0]^.val := -128;
|
||||
|
||||
{ No further optimisations can be made on this instruction, so move
|
||||
onto the next one to save time }
|
||||
p := tai(p.Next);
|
||||
UpdateUsedRegs(p);
|
||||
|
||||
Result := True;
|
||||
Exit;
|
||||
end;
|
||||
end;
|
||||
|
||||
{ Detect:
|
||||
|
||||
Loading…
Reference in New Issue
Block a user