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https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-04-05 17:08:01 +02:00
+ more change information
This commit is contained in:
parent
860c32f833
commit
73a251410e
@ -1431,18 +1431,18 @@
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(Ch: [Ch_Wop2, Ch_Rop1]),
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(Ch: [Ch_Wop2, Ch_Rop1]),
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(Ch: [Ch_Wop2, Ch_Rop1]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_All]),
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(Ch: [Ch_Mop2, Ch_Rop1]),
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(Ch: [Ch_Mop2, Ch_Rop1]),
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@ -1445,18 +1445,18 @@
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(Ch: [Ch_Wop2, Ch_Rop1]),
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(Ch: [Ch_Wop2, Ch_Rop1]),
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(Ch: [Ch_Wop2, Ch_Rop1]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_All]),
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(Ch: [Ch_Mop2, Ch_Rop1]),
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(Ch: [Ch_Mop2, Ch_Rop1]),
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@ -4886,31 +4886,31 @@ ymmreg,ymmreg,ymmrm,imm8 \361\362\364\372\1\x0E\75\120\27 AVX2
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[VPCLMULQDQ]
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(Ch_Wop4, Ch_Rop3, Ch_Rop2, Ch_Rop1)
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xmmreg,xmmreg,xmmrm,imm8 \350\361\362\372\1\x44\75\120\27 AVX,SANDYBRIDGE,TFV
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ymmreg,ymmreg,ymmrm,imm8 \350\361\364\372\1\x44\75\120\27 AVX512,TFV ;Use AVX512, but has special VPCLMULQD feature flag bit
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ymmreg,ymmreg,ymmrm,imm8 \350\361\364\372\1\x44\75\120\27 AVX512,TFV ;Use AVX512, but has special VPCLMULQD feature flag bit
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zmmreg,zmmreg,zmmrm,imm8 \350\351\361\372\1\x44\75\120\27 AVX512,TFV
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[VPCLMULLQLQDQ]
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(Ch_Wop3, Ch_Rop2, Ch_Rop1)
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xmmreg,xmmreg,xmmrm \350\361\362\372\1\x44\75\120\1\x00 AVX,SANDYBRIDGE,TFV
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ymmreg,ymmreg,ymmrm \350\361\364\372\1\x44\75\120\1\x00 AVX512,TFV ;Use AVX512, but has special VPCLMULQD feature flag bit
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ymmreg,ymmreg,ymmrm \350\361\364\372\1\x44\75\120\1\x00 AVX512,TFV ;Use AVX512, but has special VPCLMULQD feature flag bit
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zmmreg,zmmreg,zmmrm \350\351\361\372\1\x44\75\120\1\x00 AVX512,TFV
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[VPCLMULHQLQDQ]
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(Ch_Wop3, Ch_Rop2, Ch_Rop1)
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xmmreg,xmmreg,xmmrm \350\361\362\372\1\x44\75\120\1\x10 AVX,SANDYBRIDGE,TFV
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ymmreg,ymmreg,ymmrm \350\361\364\372\1\x44\75\120\1\x10 AVX512,TFV ;Use AVX512, but has special VPCLMULQD feature flag bit
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ymmreg,ymmreg,ymmrm \350\361\364\372\1\x44\75\120\1\x10 AVX512,TFV ;Use AVX512, but has special VPCLMULQD feature flag bit
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zmmreg,zmmreg,zmmrm \350\351\361\372\1\x44\75\120\1\x10 AVX512,TFV
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[VPCLMULLQHQDQ]
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(Ch_Wop3, Ch_Rop2, Ch_Rop1)
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xmmreg,xmmreg,xmmrm \350\361\362\372\1\x44\75\120\1\x01 AVX,SANDYBRIDGE,TFV
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ymmreg,ymmreg,ymmrm \350\361\364\372\1\x44\75\120\1\x01 AVX512,TFV ;Use AVX512, but has special VPCLMULQD feature flag bit
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ymmreg,ymmreg,ymmrm \350\361\364\372\1\x44\75\120\1\x01 AVX512,TFV ;Use AVX512, but has special VPCLMULQD feature flag bit
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zmmreg,zmmreg,zmmrm \350\351\361\372\1\x44\75\120\1\x01 AVX512,TFV
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[VPCLMULHQHQDQ]
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(Ch_Wop3, Ch_Rop2, Ch_Rop1)
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xmmreg,xmmreg,xmmrm \350\361\362\372\1\x44\75\120\1\x11 AVX,SANDYBRIDGE,TFV
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ymmreg,ymmreg,ymmrm \350\361\364\372\1\x44\75\120\1\x11 AVX512,TFV ;Use AVX512, but has special VPCLMULQD feature flag bit
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ymmreg,ymmreg,ymmrm \350\361\364\372\1\x44\75\120\1\x11 AVX512,TFV ;Use AVX512, but has special VPCLMULQD feature flag bit
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zmmreg,zmmreg,zmmrm \350\351\361\372\1\x44\75\120\1\x11 AVX512,TFV
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[VPCMPEQB]
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@ -9071,7 +9071,7 @@ ymmreg_mz,ymmrm \350\352\361\364\371\1\x54\110
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zmmreg_mz,zmmrm \350\351\352\361\371\1\x54\110 AVX512,TFVM
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[VPSHLDD]
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(Ch_All)
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(Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4)
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xmmreg_mz,xmmreg,xmmrm,imm8 \350\361\372\1\x71\75\120\27 AVX512,TFV
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xmmreg_mz,xmmreg,bmem32,imm8 \350\361\372\1\x71\75\120\27 AVX512,TFV
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ymmreg_mz,ymmreg,ymmrm,imm8 \350\361\364\372\1\x71\75\120\27 AVX512,TFV
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@ -9080,7 +9080,7 @@ zmmreg_mz,zmmreg,zmmrm,imm8 \350\351\361\372\1\x71\75\120\27
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zmmreg_mz,zmmreg,bmem32,imm8 \350\351\361\372\1\x71\75\120\27 AVX512,TFV
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[VPSHLDQ]
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(Ch_All)
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(Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4)
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xmmreg_mz,xmmreg,xmmrm,imm8 \350\352\361\372\1\x71\75\120\27 AVX512,TFV
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xmmreg_mz,xmmreg,bmem64,imm8 \350\352\361\372\1\x71\75\120\27 AVX512,TFV
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ymmreg_mz,ymmreg,ymmrm,imm8 \350\352\361\364\372\1\x71\75\120\27 AVX512,TFV
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@ -9089,7 +9089,7 @@ zmmreg_mz,zmmreg,zmmrm,imm8 \350\351\352\361\372\1\x71\75\120\27
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zmmreg_mz,zmmreg,bmem64,imm8 \350\351\352\361\372\1\x71\75\120\27 AVX512,TFV
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[VPSHLDVD]
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(Ch_All)
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(Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4)
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xmmreg_mz,xmmreg,xmmrm \350\361\371\1\x71\75\120 AVX512,TFV
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xmmreg_mz,xmmreg,bmem32 \350\361\371\1\x71\75\120 AVX512,TFV
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ymmreg_mz,ymmreg,ymmrm \350\361\364\371\1\x71\75\120 AVX512,TFV
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@ -9098,7 +9098,7 @@ zmmreg_mz,zmmreg,zmmrm \350\351\361\371\1\x71\75\120
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zmmreg_mz,zmmreg,bmem32 \350\351\361\371\1\x71\75\120 AVX512,TFV
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[VPSHLDVQ]
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(Ch_All)
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(Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4)
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xmmreg_mz,xmmreg,xmmrm \350\352\361\371\1\x71\75\120 AVX512,TFV
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xmmreg_mz,xmmreg,bmem64 \350\352\361\371\1\x71\75\120 AVX512,TFV
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ymmreg_mz,ymmreg,ymmrm \350\352\361\364\371\1\x71\75\120 AVX512,TFV
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@ -9107,19 +9107,19 @@ zmmreg_mz,zmmreg,zmmrm \350\351\352\361\371\1\x71\75\120
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zmmreg_mz,zmmreg,bmem64 \350\351\352\361\371\1\x71\75\120 AVX512,TFV
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[VPSHLDVW]
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(Ch_All)
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(Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4)
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xmmreg_mz,xmmreg,xmmrm \350\352\361\371\1\x70\75\120 AVX512,TFVM
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ymmreg_mz,ymmreg,ymmrm \350\352\361\364\371\1\x70\75\120 AVX512,TFVM
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zmmreg_mz,zmmreg,zmmrm \350\351\352\361\371\1\x70\75\120 AVX512,TFVM
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[VPSHLDW]
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(Ch_All)
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(Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4)
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xmmreg_mz,xmmreg,xmmrm,imm8 \350\352\361\372\1\x70\75\120\27 AVX512,TFVM
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ymmreg_mz,ymmreg,ymmrm,imm8 \350\352\361\364\372\1\x70\75\120\27 AVX512,TFVM
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zmmreg_mz,zmmreg,zmmrm,imm8 \350\351\352\361\372\1\x70\75\120\27 AVX512,TFVM
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[VPSHRDD]
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(Ch_All)
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(Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4)
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xmmreg_mz,xmmreg,xmmrm,imm8 \350\361\372\1\x73\75\120\27 AVX512,TFV
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xmmreg_mz,xmmreg,bmem32,imm8 \350\361\372\1\x73\75\120\27 AVX512,TFV
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ymmreg_mz,ymmreg,ymmrm,imm8 \350\361\364\372\1\x73\75\120\27 AVX512,TFV
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@ -9128,7 +9128,7 @@ zmmreg_mz,zmmreg,zmmrm,imm8 \350\351\361\372\1\x73\75\120\27
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zmmreg_mz,zmmreg,bmem32,imm8 \350\351\361\372\1\x73\75\120\27 AVX512,TFV
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[VPSHRDQ]
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(Ch_All)
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(Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4)
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xmmreg_mz,xmmreg,xmmrm,imm8 \350\352\361\372\1\x73\75\120\27 AVX512,TFV
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xmmreg_mz,xmmreg,bmem64,imm8 \350\352\361\372\1\x73\75\120\27 AVX512,TFV
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ymmreg_mz,ymmreg,ymmrm,imm8 \350\352\361\364\372\1\x73\75\120\27 AVX512,TFV
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@ -9137,7 +9137,7 @@ zmmreg_mz,zmmreg,zmmrm,imm8 \350\351\352\361\372\1\x73\75\120\27
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zmmreg_mz,zmmreg,bmem64,imm8 \350\351\352\361\372\1\x73\75\120\27 AVX512,TFV
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[VPSHRDVD]
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(Ch_All)
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(Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4)
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xmmreg_mz,xmmreg,xmmrm \350\361\371\1\x73\75\120 AVX512,TFV
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xmmreg_mz,xmmreg,bmem32 \350\361\371\1\x73\75\120 AVX512,TFV
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ymmreg_mz,ymmreg,ymmrm \350\361\364\371\1\x73\75\120 AVX512,TFV
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@ -9146,7 +9146,7 @@ zmmreg_mz,zmmreg,zmmrm \350\351\361\371\1\x73\75\120
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zmmreg_mz,zmmreg,bmem32 \350\351\361\371\1\x73\75\120 AVX512,TFV
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[VPSHRDVQ]
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(Ch_All)
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(Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4)
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xmmreg_mz,xmmreg,xmmrm \350\352\361\371\1\x73\75\120 AVX512,TFV
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xmmreg_mz,xmmreg,bmem64 \350\352\361\371\1\x73\75\120 AVX512,TFV
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ymmreg_mz,ymmreg,ymmrm \350\352\361\364\371\1\x73\75\120 AVX512,TFV
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@ -9155,13 +9155,13 @@ zmmreg_mz,zmmreg,zmmrm \350\351\352\361\371\1\x73\75\120
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zmmreg_mz,zmmreg,bmem64 \350\351\352\361\371\1\x73\75\120 AVX512,TFV
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[VPSHRDVW]
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(Ch_All)
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(Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4)
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xmmreg_mz,xmmreg,xmmrm \350\352\361\371\1\x72\75\120 AVX512,TFVM
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ymmreg_mz,ymmreg,ymmrm \350\352\361\364\371\1\x72\75\120 AVX512,TFVM
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zmmreg_mz,zmmreg,zmmrm \350\351\352\361\371\1\x72\75\120 AVX512,TFVM
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[VPSHRDW]
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(Ch_All)
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(Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4)
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xmmreg_mz,xmmreg,xmmrm,imm8 \350\352\361\372\1\x72\75\120\27 AVX512,TFVM
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ymmreg_mz,ymmreg,ymmrm,imm8 \350\352\361\364\372\1\x72\75\120\27 AVX512,TFVM
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zmmreg_mz,zmmreg,zmmrm,imm8 \350\351\352\361\372\1\x72\75\120\27 AVX512,TFVM
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@ -1427,18 +1427,18 @@
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(Ch: [Ch_Wop2, Ch_Rop1]),
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(Ch: [Ch_Wop2, Ch_Rop1]),
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(Ch: [Ch_Wop2, Ch_Rop1]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_All]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_Rop1, Ch_Rop2, Ch_Rop3, Ch_Wop4]),
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(Ch: [Ch_All]),
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(Ch: [Ch_Mop2, Ch_Rop1]),
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(Ch: [Ch_Mop2, Ch_Rop1]),
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