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* fix and improve MovImul2Imul: we cannot insert the move target into imul if the imul is 64 bit and the mov 32 bit as

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we cannot ensure that the upper 32 bits of the move target are really clear

git-svn-id: trunk@43447 -
This commit is contained in:
florian 2019-11-10 21:09:06 +00:00
parent 4b455600b8
commit 7464c88003
1 changed files with 4 additions and 4 deletions
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8
compiler/x86/aoptx86.pas
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@ -3164,18 +3164,18 @@ unit aoptx86;
GetLastInstruction(p,hp1) and
MatchInstruction(hp1,A_MOV,[]) and
MatchOpType(taicpu(hp1),top_reg,top_reg) and
((taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) or
((taicpu(hp1).opsize=S_L) and (taicpu(p).opsize=S_Q) and SuperRegistersEqual(taicpu(hp1).oper[1]^.reg,taicpu(p).oper[1]^.reg))) then
(taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
begin
TransferUsedRegs(TmpUsedRegs);
if not(RegUsedAfterInstruction(taicpu(p).oper[1]^.reg,p,TmpUsedRegs)) then
if not(RegUsedAfterInstruction(taicpu(p).oper[1]^.reg,p,TmpUsedRegs)) or
((taicpu(p).ops = 3) and (taicpu(p).oper[1]^.reg=taicpu(p).oper[2]^.reg)) then
{ change
mov reg1,reg2
imul y,reg2 to imul y,reg1,reg2 }
begin
taicpu(p).ops := 3;
taicpu(p).loadreg(2,taicpu(p).oper[1]^.reg);
taicpu(p).loadreg(1,taicpu(hp1).oper[0]^.reg);
taicpu(p).loadreg(2,taicpu(hp1).oper[1]^.reg);
DebugMsg(SPeepholeOptimization + 'MovImul2Imul done',p);
asml.remove(hp1);
hp1.free;