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* x86: Additional optimisation in OptPass2MOV to help with sub-optimal MOV/CMP/MOV triplets (and a minor refactor).
This commit is contained in:
J. Gareth "Curious Kit" Moreton
FPK
parent
f4e955d04f
commit
755d221230
@ -10003,13 +10003,64 @@ unit aoptx86;
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if not GetNextInstruction(p, hp1) then
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Exit;
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if MatchInstruction(hp1, A_CMP, A_TEST, [taicpu(p).opsize])
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and DoMovCmpMemOpt(p, hp1) then
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if MatchInstruction(hp1, A_CMP, A_TEST, []) then
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begin
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Result := True;
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Exit;
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end
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else if MatchInstruction(hp1, A_JMP, [S_NO]) then
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if (taicpu(hp1).opsize = taicpu(p).opsize) and DoMovCmpMemOpt(p, hp1) then
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begin
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Result := True;
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Exit;
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end;
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{ This optimisation is only effective on a second run of Pass 2,
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hence -O3 or above.
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Change:
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mov %reg1,%reg2
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cmp/test (contains %reg1)
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mov x, %reg1
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(another mov or a j(c))
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To:
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mov %reg1,%reg2
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mov x, %reg1
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cmp (%reg1 replaced with %reg2)
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(another mov or a j(c))
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The requirement of an additional MOV or a jump ensures there
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isn't performance loss, since a j(c) will permit macro-fusion
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with the cmp instruction, while another MOV likely means it's
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not all being executed in a single cycle due to parallelisation.
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}
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if (cs_opt_level3 in current_settings.optimizerswitches) and
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MatchOpType(taicpu(p), top_reg, top_reg) and
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RegInInstruction(taicpu(p).oper[0]^.reg, taicpu(hp1)) and
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GetNextInstruction(hp1, hp2) and
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MatchInstruction(hp2, A_MOV, []) and
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(taicpu(hp2).oper[1]^.typ = top_reg) and
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{ Registers don't have to be the same size in this case }
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SuperRegistersEqual(taicpu(hp2).oper[1]^.reg, taicpu(p).oper[0]^.reg) and
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GetNextInstruction(hp2, hp3) and
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MatchInstruction(hp3, A_MOV, A_Jcc, []) and
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{ Make sure the operands in the camparison can be safely replaced }
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(
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not RegInOp(taicpu(p).oper[0]^.reg, taicpu(hp1).oper[0]^) or
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ReplaceRegisterInOper(taicpu(hp1), 0, taicpu(p).oper[0]^.reg, taicpu(p).oper[1]^.reg)
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) and
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(
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not RegInOp(taicpu(p).oper[0]^.reg, taicpu(hp1).oper[1]^) or
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ReplaceRegisterInOper(taicpu(hp1), 1, taicpu(p).oper[0]^.reg, taicpu(p).oper[1]^.reg)
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) then
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begin
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DebugMsg(SPeepholeOptimization + 'MOV/CMP/MOV -> MOV/MOV/CMP', p);
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AsmL.Remove(hp2);
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AsmL.InsertAfter(hp2, p);
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Result := True;
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Exit;
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end;
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end;
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if MatchInstruction(hp1, A_JMP, [S_NO]) then
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begin
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{ Sometimes the MOVs that OptPass2JMP produces can be improved
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further, but we can't just put this jump optimisation in pass 1
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@ -10019,21 +10070,30 @@ unit aoptx86;
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UpdateUsedRegs(tai(p.Next));
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if OptPass2JMP(hp1) then
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{ call OptPass1MOV once to potentially merge any MOVs that were created }
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Result := OptPass1MOV(p);
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{ OptPass2MOV will now exit but will be called again if OptPass1MOV
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returned True and the instruction is still a MOV, thus checking
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the optimisations below }
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begin
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{ Restore register state }
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RestoreUsedRegs(TempTracking);
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ReleaseUsedRegs(TempTracking);
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{ call OptPass1MOV once to potentially merge any MOVs that were created }
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OptPass1MOV(p);
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Result := True;
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Exit;
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end;
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{ If OptPass2JMP returned False, no optimisations were done to
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the jump and there are no further optimisations that can be done
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to the MOV instruction on this pass }
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to the MOV instruction on this pass other than FuncMov2Func }
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{ Restore register state }
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RestoreUsedRegs(TempTracking);
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ReleaseUsedRegs(TempTracking);
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end
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else if MatchOpType(taicpu(p),top_reg,top_reg) and
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Result := FuncMov2Func(p, hp1);
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Exit;
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end;
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if MatchOpType(taicpu(p),top_reg,top_reg) and
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(taicpu(p).opsize in [S_L{$ifdef x86_64}, S_Q{$endif x86_64}]) and
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MatchInstruction(hp1,A_ADD,A_SUB,[taicpu(p).opsize]) and
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(taicpu(hp1).oper[1]^.typ = top_reg) and
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@ -10076,8 +10136,9 @@ unit aoptx86;
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Exit;
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end;
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end;
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end
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else if MatchOpType(taicpu(p),top_reg,top_reg) and
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end;
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if MatchOpType(taicpu(p),top_reg,top_reg) and
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{$ifdef x86_64}
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MatchInstruction(hp1,A_MOVZX,A_MOVSX,A_MOVSXD,[]) and
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{$else x86_64}
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@ -10105,11 +10166,12 @@ unit aoptx86;
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Result:=true;
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end;
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exit;
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end
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else if MatchOpType(taicpu(p),top_reg,top_reg) and
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Exit;
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end;
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if MatchOpType(taicpu(p),top_reg,top_reg) and
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IsXCHGAcceptable and
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{ XCHG doesn't support 8-byte registers }
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{ XCHG doesn't support 8-bit registers }
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(taicpu(p).opsize <> S_B) and
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MatchInstruction(hp1, A_MOV, []) and
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MatchOpType(taicpu(hp1),top_reg,top_reg) and
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@ -10146,8 +10208,9 @@ unit aoptx86;
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Result := True;
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Exit;
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end;
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end
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else if MatchOpType(taicpu(p),top_reg,top_reg) and
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end;
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if MatchOpType(taicpu(p),top_reg,top_reg) and
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MatchInstruction(hp1, A_SAR, []) then
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begin
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if MatchOperand(taicpu(hp1).oper[0]^, 31) then
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@ -10172,7 +10235,9 @@ unit aoptx86;
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taicpu(p).clearop(1);
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taicpu(p).clearop(0);
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taicpu(p).ops:=0;
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Result := True;
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Exit;
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end
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else if (cs_opt_size in current_settings.optimizerswitches) and
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(taicpu(p).oper[0]^.reg = NR_EDX) and
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@ -10194,6 +10259,9 @@ unit aoptx86;
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taicpu(hp1).clearop(1);
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taicpu(hp1).clearop(0);
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taicpu(hp1).ops:=0;
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Include(OptsToCheck, aoc_ForceNewIteration);
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Exit;
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end;
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{$ifndef x86_64}
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end
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@ -10273,6 +10341,9 @@ unit aoptx86;
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else
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;
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end;
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Result := True;
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Exit;
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end;
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end;
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{$else x86_64}
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@ -10299,7 +10370,9 @@ unit aoptx86;
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taicpu(p).clearop(1);
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taicpu(p).clearop(0);
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taicpu(p).ops:=0;
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Result := True;
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Exit;
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end
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else if (cs_opt_size in current_settings.optimizerswitches) and
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(taicpu(p).oper[0]^.reg = NR_RDX) and
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@ -10321,11 +10394,15 @@ unit aoptx86;
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taicpu(hp1).clearop(1);
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taicpu(hp1).clearop(0);
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taicpu(hp1).ops:=0;
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Include(OptsToCheck, aoc_ForceNewIteration);
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Exit;
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{$endif x86_64}
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end;
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end;
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end
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else if MatchInstruction(hp1, A_MOV, []) and
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end;
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if MatchInstruction(hp1, A_MOV, []) and
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(taicpu(hp1).oper[1]^.typ = top_reg) then
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{ Though "GetNextInstruction" could be factored out, along with
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the instructions that depend on hp2, it is an expensive call that
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@ -10376,6 +10453,8 @@ unit aoptx86;
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taicpu(hp1).ops:=0;
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RemoveInstruction(hp2);
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Include(OptsToCheck, aoc_ForceNewIteration);
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(*
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{$ifdef x86_64}
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end
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@ -10423,13 +10502,16 @@ unit aoptx86;
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taicpu(hp1).ops:=0;
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RemoveInstruction(hp2);
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Include(OptsToCheck, aoc_ForceNewIteration);
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{$endif x86_64}
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*)
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end;
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end;
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{$ifdef x86_64}
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end
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else if (taicpu(p).opsize = S_L) and
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end;
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if (taicpu(p).opsize = S_L) and
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(taicpu(p).oper[1]^.typ = top_reg) and
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(
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MatchInstruction(hp1, A_MOV,[]) and
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@ -10502,10 +10584,17 @@ unit aoptx86;
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DebugMsg(SPeepholeOptimization + 'MovMov*Shr2MovMov*Rcr', p);
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if (getsupreg(taicpu(hp2).oper[1]^.reg) = getsupreg(taicpu(hp1).oper[1]^.reg)) then
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{ Change first MOV command to have the same register as the final output }
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taicpu(p).oper[1]^.reg := taicpu(hp1).oper[1]^.reg
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begin
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{ Change first MOV command to have the same register as the final output }
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taicpu(p).oper[1]^.reg := taicpu(hp1).oper[1]^.reg;
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AllocRegBetween(taicpu(hp1).oper[1]^.reg, p, hp1, UsedRegs);
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Result := True;
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end
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else
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taicpu(hp1).oper[1]^.reg := taicpu(p).oper[1]^.reg;
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begin
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taicpu(hp1).oper[1]^.reg := taicpu(p).oper[1]^.reg;
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Include(OptsToCheck, aoc_ForceNewIteration);
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end;
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{ Change second MOV command to an ADD command. This is easier than
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converting the existing command because it means we don't have to
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@ -10520,6 +10609,8 @@ unit aoptx86;
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taicpu(hp3).opcode := A_RCR;
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taicpu(hp3).changeopsize(S_L);
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setsubreg(taicpu(hp3).oper[1]^.reg, R_SUBD);
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{ Don't need to Exit yet as p is still a MOV and hp1 hasn't been
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called, so FuncMov2Func below is safe to call }
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{$endif x86_64}
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end;
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