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Correctly handle 64-Bit values when converting ints to bools. Fixes 2 tests.
m68k/n68kcnv.pas, tn68kcnv.second_int_to_bool: * we need to check both the upper and the lower register for a 64-bit value to decide whether it's True or False git-svn-id: trunk@25625 -
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@ -158,6 +158,7 @@ implementation
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var
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hreg1,
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hreg2 : tregister;
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reg64 : tregister64;
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resflags : tresflags;
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opsize : tcgsize;
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newsize : tcgsize;
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@ -195,29 +196,50 @@ implementation
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case left.location.loc of
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LOC_CREFERENCE,LOC_REFERENCE :
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begin
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{ can we optimize it, or do we need to fix the ref. ? }
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if isvalidrefoffset(left.location.reference) then
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if opsize in [OS_64,OS_S64] then
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begin
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current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_TST,TCGSize2OpSize[opsize],
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left.location.reference));
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reg64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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reg64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
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cg64.a_load64_loc_reg(current_asmdata.CurrAsmList,left.location,reg64);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_OR,S_L,reg64.reghi,reg64.reglo));
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,S_L,reg64.reglo));
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end
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else
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begin
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hreg2:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
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cg.a_load_ref_reg(current_asmdata.CurrAsmList,opsize,opsize,
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left.location.reference,hreg2);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,TCGSize2OpSize[opsize],hreg2));
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// cg.ungetcpuregister(current_asmdata.CurrAsmList,hreg2);
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{ can we optimize it, or do we need to fix the ref. ? }
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if isvalidrefoffset(left.location.reference) then
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begin
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current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_TST,TCGSize2OpSize[opsize],
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left.location.reference));
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end
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else
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begin
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hreg2:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
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cg.a_load_ref_reg(current_asmdata.CurrAsmList,opsize,opsize,
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left.location.reference,hreg2);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,TCGSize2OpSize[opsize],hreg2));
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// cg.ungetcpuregister(current_asmdata.CurrAsmList,hreg2);
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end;
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// reference_release(current_asmdata.CurrAsmList,left.location.reference);
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end;
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// reference_release(current_asmdata.CurrAsmList,left.location.reference);
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resflags:=F_NE;
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hreg1:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
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end;
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LOC_REGISTER,LOC_CREGISTER :
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begin
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hreg2:=left.location.register;
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,TCGSize2OpSize[opsize],hreg2));
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// cg.ungetcpuregister(current_asmdata.CurrAsmList,hreg2);
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if opsize in [OS_64,OS_S64] then
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begin
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hreg2:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_MOVE,S_L,left.location.register64.reglo,hreg2));
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current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_OR,S_L,left.location.register64.reghi,hreg2));
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,S_L,hreg2));
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end
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else
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begin
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hreg2:=left.location.register;
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current_asmdata.CurrAsmList.concat(taicpu.op_reg(A_TST,TCGSize2OpSize[opsize],hreg2));
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// cg.ungetcpuregister(current_asmdata.CurrAsmList,hreg2);
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end;
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hreg1:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
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resflags:=F_NE;
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end;
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