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* patch by J. Gareth Moreton: ARM - str/str -> stm optimisation, second part of #38975
git-svn-id: trunk@49499 -
This commit is contained in:
florian
parent
9d2e71ff69
commit
776667366f
@ -42,7 +42,7 @@ Type
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{ uses the same constructor as TAopObj }
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function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
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procedure PeepHoleOptPass2;override;
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function PeepHoleOptPass2Cpu(var p: tai): boolean; override;
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Function RegInInstruction(Reg: TRegister; p1: tai): Boolean;override;
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function RemoveSuperfluousVMov(const p : tai; movp : tai; const optimizer : string) : boolean;
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@ -79,6 +79,10 @@ Type
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function OptPass1MVN(var p: tai): Boolean;
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function OptPass1VMov(var p: tai): Boolean;
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function OptPass1VOp(var p: tai): Boolean;
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function OptPass2Bcc(var p: tai): Boolean;
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function OptPass2STM(var p: tai): Boolean;
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function OptPass2STR(var p: tai): Boolean;
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End;
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TCpuPreRegallocScheduler = class(TAsmScheduler)
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@ -1894,6 +1898,300 @@ Implementation
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end;
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function TCpuAsmOptimizer.OptPass2Bcc(var p: tai): Boolean;
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var
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hp1,hp2,hp3,after_p: tai;
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l : longint;
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WasLast: boolean;
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Label_X, Label_Y: TASmLabel;
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procedure ConvertInstructins(this_hp: tai; newcond: tasmcond);
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var
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next_hp: tai;
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begin
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repeat
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if this_hp.typ=ait_instruction then
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taicpu(this_hp).condition := newcond;
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GetNextInstruction(this_hp, next_hp);
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if MustBeLast(this_hp) then
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Break;
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this_hp := next_hp
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until not(assigned(this_hp)) or
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not(CanBeCond(this_hp)) or
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((hp1.typ = ait_instruction) and (taicpu(hp1).opcode = A_B)) or
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(this_hp.typ = ait_label);
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end;
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begin
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Result := False;
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if (taicpu(p).condition<>C_None) and
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not(GenerateThumbCode) then
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begin
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{ check for
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Bxx xxx
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<several instructions>
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xxx:
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}
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Label_X := TAsmLabel(taicpu(p).oper[0]^.ref^.symbol);
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l:=0;
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WasLast:=False;
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GetNextInstruction(p, hp1);
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after_p := hp1;
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while assigned(hp1) and
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(l<=4) and
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CanBeCond(hp1) and
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{ stop on labels }
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not(hp1.typ=ait_label) and
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{ avoid that we cannot recognize the case BccB2Cond }
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not((hp1.typ=ait_instruction) and (taicpu(hp1).opcode=A_B)) do
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begin
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inc(l);
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if MustBeLast(hp1) then
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begin
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WasLast:=True;
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GetNextInstruction(hp1,hp1);
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break;
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end
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else
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GetNextInstruction(hp1,hp1);
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end;
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if assigned(hp1) then
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begin
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if FindLabel(Label_X, hp1) then
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begin
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if (l<=4) and (l>0) then
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begin
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ConvertInstructins(after_p, inverse_cond(taicpu(p).condition));
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DebugMsg(SPeepholeOptimization + 'Bcc2Cond done', p);
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{ wait with removing else GetNextInstruction could
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ignore the label if it was the only usage in the
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jump moved away }
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Label_X.decrefs;
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RemoveCurrentP(p, after_p);
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Result := True;
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Exit;
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end;
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end
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else
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{ do not perform further optimizations if there is an instruction
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in block #1 which cannot be optimized.
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}
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if not WasLast then
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begin
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{ check further for
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Bcc xxx
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<several instructions 1>
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B yyy
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xxx:
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<several instructions 2>
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yyy:
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}
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{ hp2 points to jmp yyy }
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hp2:=hp1;
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{ skip hp2 to xxx }
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if assigned(hp2) and
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(l<=3) and
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(hp2.typ=ait_instruction) and
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(taicpu(hp2).is_jmp) and
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(taicpu(hp2).condition=C_None) and
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GetNextInstruction(hp2, hp1) and
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{ real label and jump, no further references to the
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label are allowed }
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(Label_X.getrefs = 1) and
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FindLabel(Label_X, hp1) then
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begin
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Label_Y := TAsmLabel(taicpu(hp2).oper[0]^.ref^.symbol);
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l:=0;
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{ skip hp1 and hp3 to <several moves 2> }
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GetNextInstruction(hp1, hp1);
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hp3 := hp1;
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while assigned(hp1) and
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CanBeCond(hp1) and
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(l<=3) do
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begin
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inc(l);
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if MustBeLast(hp1) then
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begin
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GetNextInstruction(hp1, hp1);
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break;
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end
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else
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GetNextInstruction(hp1, hp1);
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end;
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{ hp1 points to yyy: }
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if assigned(hp1) and
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FindLabel(Label_Y, hp1) then
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begin
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ConvertInstructins(after_p, inverse_cond(taicpu(p).condition));
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ConvertInstructins(hp3, taicpu(p).condition);
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DebugMsg(SPeepholeOptimization + 'BccB2Cond done', after_p);
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{ remove B }
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Label_Y.decrefs;
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RemoveInstruction(hp2);
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{ remove Bcc }
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Label_X.decrefs;
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RemoveCurrentP(p, after_p);
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Result := True;
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Exit;
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end;
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end;
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end;
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end;
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end;
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end;
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function TCpuAsmOptimizer.OptPass2STR(var p: tai): Boolean;
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var
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hp1: tai;
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Postfix: TOpPostfix;
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OpcodeStr: shortstring;
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begin
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Result := False;
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{ Try to merge two STRs into an STM instruction }
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if (taicpu(p).oper[1]^.typ = top_ref) and
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(taicpu(p).oper[1]^.ref^.addressmode = AM_OFFSET) and
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(
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(taicpu(p).oper[1]^.ref^.base = NR_NO) or
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(taicpu(p).oper[1]^.ref^.index = NR_NO)
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) and
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(taicpu(p).oppostfix = PF_None) and
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(getregtype(taicpu(p).oper[0]^.reg) = R_INTREGISTER) then
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begin
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hp1 := p;
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while GetNextInstruction(hp1, hp1) and (hp1.typ = ait_instruction) and
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(taicpu(hp1).opcode = A_STR) do
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if (taicpu(hp1).condition = taicpu(p).condition) and
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(taicpu(hp1).oppostfix = PF_None) and
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(getregtype(taicpu(hp1).oper[0]^.reg) = R_INTREGISTER) and
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(taicpu(hp1).oper[1]^.ref^.addressmode = AM_OFFSET) and
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(taicpu(hp1).oper[1]^.ref^.base = taicpu(p).oper[1]^.ref^.base) and
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(taicpu(hp1).oper[1]^.ref^.index = taicpu(p).oper[1]^.ref^.index) and
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(
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(
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(taicpu(p).oper[1]^.ref^.offset = 0) and
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(getsupreg(taicpu(hp1).oper[0]^.reg) > getsupreg(taicpu(p).oper[0]^.reg)) and
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(abs(taicpu(hp1).oper[1]^.ref^.offset) = 4)
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) or (
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(taicpu(hp1).oper[1]^.ref^.offset = 0) and
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(getsupreg(taicpu(hp1).oper[0]^.reg) < getsupreg(taicpu(p).oper[0]^.reg)) and
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(abs(taicpu(p).oper[1]^.ref^.offset) = 4)
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)
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) then
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begin
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if (getsupreg(taicpu(hp1).oper[0]^.reg) < getsupreg(taicpu(p).oper[0]^.reg)) xor
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(taicpu(hp1).oper[1]^.ref^.offset < taicpu(p).oper[1]^.ref^.offset) then
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begin
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Postfix := PF_DA;
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OpcodeStr := 'DA';
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end
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else
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begin
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Postfix := PF_None;
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OpcodeStr := '';
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end;
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taicpu(hp1).oper[1]^.ref^.offset := 0;
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if taicpu(hp1).oper[1]^.ref^.index = NR_NO then
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begin
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taicpu(hp1).oper[1]^.ref^.index := taicpu(hp1).oper[1]^.ref^.base;
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taicpu(hp1).oper[1]^.ref^.base := NR_NO;
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end;
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taicpu(p).opcode := A_STM;
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taicpu(p).loadregset(1, R_INTREGISTER, R_SUBWHOLE, [getsupreg(taicpu(p).oper[0]^.reg), getsupreg(taicpu(hp1).oper[0]^.reg)]);
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taicpu(p).loadref(0, taicpu(hp1).oper[1]^.ref^);
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taicpu(p).oppostfix := Postfix;
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RemoveInstruction(hp1);
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DebugMsg(SPeepholeOptimization + 'Merging stores: STR/STR -> STM' + OpcodeStr, p);
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Result := True;
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Exit;
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end;
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end;
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end;
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function TCpuAsmOptimizer.OptPass2STM(var p: tai): Boolean;
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var
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hp1: tai;
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CorrectOffset:ASizeInt;
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i, LastReg: TSuperRegister;
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Postfix: TOpPostfix;
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OpcodeStr: shortstring;
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begin
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Result := False;
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{ See if STM/STR can be merged into a single STM }
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if (taicpu(p).oper[0]^.ref^.addressmode = AM_OFFSET) then
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begin
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CorrectOffset := 0;
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LastReg := RS_NO;
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for i in taicpu(p).oper[1]^.regset^ do
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begin
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LastReg := i;
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Inc(CorrectOffset, 4);
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end;
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{ This while loop effectively doea a Selection Sort on any STR
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instructions that follow }
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hp1 := p;
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while (LastReg < maxcpuregister) and
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GetNextInstruction(hp1, hp1) and (hp1.typ = ait_instruction) and
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(taicpu(hp1).opcode = A_STR) do
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if (taicpu(hp1).condition = taicpu(p).condition) and
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(taicpu(hp1).oppostfix = PF_None) and
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(getregtype(taicpu(hp1).oper[0]^.reg) = R_INTREGISTER) and
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(taicpu(hp1).oper[1]^.ref^.addressmode = AM_OFFSET) and
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(
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(
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(taicpu(p).oper[1]^.ref^.base = NR_NO) and
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(taicpu(hp1).oper[1]^.ref^.index = taicpu(p).oper[0]^.ref^.index)
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) or (
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(taicpu(p).oper[1]^.ref^.index = NR_NO) and
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(taicpu(hp1).oper[1]^.ref^.base = taicpu(p).oper[0]^.ref^.base)
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)
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) and
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{ Next register must be later in the set }
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(getsupreg(taicpu(hp1).oper[0]^.reg) > LastReg) and
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(
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(
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(taicpu(p).oppostfix = PF_None) and
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(taicpu(hp1).oper[1]^.ref^.offset = CorrectOffset)
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) or (
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(taicpu(p).oppostfix = PF_DA) and
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(taicpu(hp1).oper[1]^.ref^.offset = -CorrectOffset)
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)
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) then
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begin
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{ Increment the reference values ready for the next STR instruction to find }
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LastReg := getsupreg(taicpu(hp1).oper[0]^.reg);
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Inc(CorrectOffset, 4);
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if (taicpu(p).oppostfix = PF_DA) then
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OpcodeStr := 'DA'
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else
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OpcodeStr := '';
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Include(taicpu(p).oper[1]^.regset^, LastReg);
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DebugMsg(SPeepholeOptimization + 'Merging stores: STM' + OpcodeStr + '/STR -> STM' + OpcodeStr, hp1);
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RemoveInstruction(hp1);
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Result := True;
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{ See if we can find another one to merge }
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hp1 := p;
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Continue;
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end;
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end;
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end;
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function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
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begin
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result := false;
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@ -1965,6 +2263,24 @@ Implementation
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end;
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function TCpuAsmOptimizer.PeepHoleOptPass2Cpu(var p: tai): boolean;
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begin
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result := False;
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if p.typ = ait_instruction then
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begin
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case taicpu(p).opcode of
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A_B:
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Result := OptPass2Bcc(p);
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A_STM:
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Result := OptPass2STM(p);
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A_STR:
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Result := OptPass2STR(p);
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else
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;
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end;
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end;
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end;
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{ instructions modifying the CPSR can be only the last instruction }
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function MustBeLast(p : tai) : boolean;
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begin
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@ -1975,193 +2291,6 @@ Implementation
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end;
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procedure TCpuAsmOptimizer.PeepHoleOptPass2;
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var
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p,hp1,hp2: tai;
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l : longint;
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condition : tasmcond;
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hp3: tai;
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WasLast: boolean;
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{ UsedRegs, TmpUsedRegs: TRegSet; }
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begin
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p := BlockStart;
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{ UsedRegs := []; }
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while (p <> BlockEnd) Do
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begin
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{ UpdateUsedRegs(UsedRegs, tai(p.next)); }
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case p.Typ Of
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Ait_Instruction:
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begin
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case taicpu(p).opcode Of
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A_B:
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if (taicpu(p).condition<>C_None) and
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not(GenerateThumbCode) then
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begin
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{ check for
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Bxx xxx
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<several instructions>
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xxx:
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}
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l:=0;
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WasLast:=False;
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GetNextInstruction(p, hp1);
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while assigned(hp1) and
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(l<=4) and
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CanBeCond(hp1) and
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{ stop on labels }
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not(hp1.typ=ait_label) and
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{ avoid that we cannot recognize the case BccB2Cond }
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not((hp1.typ=ait_instruction) and (taicpu(hp1).opcode=A_B)) do
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begin
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inc(l);
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if MustBeLast(hp1) then
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begin
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WasLast:=True;
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GetNextInstruction(hp1,hp1);
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break;
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end
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else
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GetNextInstruction(hp1,hp1);
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end;
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if assigned(hp1) then
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begin
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if FindLabel(tasmlabel(taicpu(p).oper[0]^.ref^.symbol),hp1) then
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begin
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if (l<=4) and (l>0) then
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begin
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condition:=inverse_cond(taicpu(p).condition);
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hp2:=p;
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GetNextInstruction(p,hp1);
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p:=hp1;
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repeat
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if hp1.typ=ait_instruction then
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taicpu(hp1).condition:=condition;
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if MustBeLast(hp1) then
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begin
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GetNextInstruction(hp1,hp1);
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break;
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end
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else
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GetNextInstruction(hp1,hp1);
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until not(assigned(hp1)) or
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not(CanBeCond(hp1)) or
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(hp1.typ=ait_label);
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DebugMsg('Peephole Bcc2Cond done',hp2);
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{ wait with removing else GetNextInstruction could
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ignore the label if it was the only usage in the
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jump moved away }
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tasmlabel(taicpu(hp2).oper[0]^.ref^.symbol).decrefs;
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asml.remove(hp2);
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hp2.free;
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continue;
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end;
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end
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else
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{ do not perform further optimizations if there is inctructon
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in block #1 which can not be optimized.
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}
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if not WasLast then
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begin
|
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{ check further for
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Bcc xxx
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<several instructions 1>
|
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B yyy
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xxx:
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<several instructions 2>
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yyy:
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}
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{ hp2 points to jmp yyy }
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hp2:=hp1;
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{ skip hp1 to xxx }
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GetNextInstruction(hp1, hp1);
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if assigned(hp2) and
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assigned(hp1) and
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(l<=3) and
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(hp2.typ=ait_instruction) and
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(taicpu(hp2).is_jmp) and
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(taicpu(hp2).condition=C_None) and
|
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{ real label and jump, no further references to the
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label are allowed }
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(tasmlabel(taicpu(p).oper[0]^.ref^.symbol).getrefs=1) and
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FindLabel(tasmlabel(taicpu(p).oper[0]^.ref^.symbol),hp1) then
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begin
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l:=0;
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{ skip hp1 to <several moves 2> }
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GetNextInstruction(hp1, hp1);
|
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while assigned(hp1) and
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CanBeCond(hp1) and
|
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(l<=3) do
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begin
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inc(l);
|
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if MustBeLast(hp1) then
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begin
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GetNextInstruction(hp1, hp1);
|
||||
break;
|
||||
end
|
||||
else
|
||||
GetNextInstruction(hp1, hp1);
|
||||
end;
|
||||
{ hp1 points to yyy: }
|
||||
if assigned(hp1) and
|
||||
FindLabel(tasmlabel(taicpu(hp2).oper[0]^.ref^.symbol),hp1) then
|
||||
begin
|
||||
condition:=inverse_cond(taicpu(p).condition);
|
||||
GetNextInstruction(p,hp1);
|
||||
hp3:=p;
|
||||
p:=hp1;
|
||||
repeat
|
||||
if hp1.typ=ait_instruction then
|
||||
taicpu(hp1).condition:=condition;
|
||||
if MustBeLast(hp1) then
|
||||
begin
|
||||
GetNextInstruction(hp1, hp1);
|
||||
break;
|
||||
end
|
||||
else
|
||||
GetNextInstruction(hp1, hp1);
|
||||
until not(assigned(hp1)) or
|
||||
not(CanBeCond(hp1)) or
|
||||
((hp1.typ=ait_instruction) and (taicpu(hp1).opcode=A_B));
|
||||
{ hp2 is still at jmp yyy }
|
||||
GetNextInstruction(hp2,hp1);
|
||||
{ hp1 is now at xxx: }
|
||||
condition:=inverse_cond(condition);
|
||||
GetNextInstruction(hp1,hp1);
|
||||
{ hp1 is now at <several movs 2> }
|
||||
repeat
|
||||
if hp1.typ=ait_instruction then
|
||||
taicpu(hp1).condition:=condition;
|
||||
GetNextInstruction(hp1,hp1);
|
||||
until not(assigned(hp1)) or
|
||||
not(CanBeCond(hp1)) or
|
||||
(hp1.typ=ait_label);
|
||||
DebugMsg('Peephole BccB2Cond done',hp3);
|
||||
{ remove Bcc }
|
||||
tasmlabel(taicpu(hp3).oper[0]^.ref^.symbol).decrefs;
|
||||
asml.remove(hp3);
|
||||
hp3.free;
|
||||
{ remove B }
|
||||
tasmlabel(taicpu(hp2).oper[0]^.ref^.symbol).decrefs;
|
||||
asml.remove(hp2);
|
||||
hp2.free;
|
||||
continue;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
end;
|
||||
else
|
||||
;
|
||||
end;
|
||||
end;
|
||||
else
|
||||
;
|
||||
end;
|
||||
p := tai(p.next)
|
||||
end;
|
||||
end;
|
||||
|
||||
function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
|
||||
begin
|
||||
If (p1.typ = ait_instruction) and (taicpu(p1).opcode=A_BL) then
|
||||
|
||||
Loading…
Reference in New Issue
Block a user