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* fix vecnode code that caused to much register conflicts
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@ -90,6 +90,7 @@ implementation
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procedure ti386vecnode.update_reference_reg_mul(reg:tregister;l:aword);
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procedure ti386vecnode.update_reference_reg_mul(reg:tregister;l:aword);
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var
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var
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l2 : integer;
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l2 : integer;
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hreg : tregister;
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begin
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begin
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{ Optimized for x86 to use the index register and scalefactor }
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{ Optimized for x86 to use the index register and scalefactor }
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if location.reference.index=NR_NO then
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if location.reference.index=NR_NO then
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@ -107,9 +108,10 @@ implementation
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end
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end
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else
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else
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begin
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begin
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cg.ungetregister(exprasmlist,location.reference.base);
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cg.ungetreference(exprasmlist,location.reference);
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cg.a_loadaddr_ref_reg(exprasmlist,location.reference,location.reference.index);
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hreg := cg.getaddressregister(exprasmlist);
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reference_reset_base(location.reference,location.reference.index,0);
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cg.a_loadaddr_ref_reg(exprasmlist,location.reference,hreg);
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reference_reset_base(location.reference,hreg,0);
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end;
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end;
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{ insert the new index register and scalefactor or
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{ insert the new index register and scalefactor or
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do the multiplication manual }
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do the multiplication manual }
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@ -142,7 +144,10 @@ begin
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end.
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end.
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{
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{
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$Log$
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$Log$
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Revision 1.58 2003-10-10 17:48:14 peter
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Revision 1.59 2003-10-21 15:13:27 peter
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* fix vecnode code that caused to much register conflicts
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Revision 1.58 2003/10/10 17:48:14 peter
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* old trgobj moved to x86/rgcpu and renamed to trgx86fpu
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* old trgobj moved to x86/rgcpu and renamed to trgx86fpu
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* tregisteralloctor renamed to trgobj
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* tregisteralloctor renamed to trgobj
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* removed rgobj from a lot of units
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* removed rgobj from a lot of units
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