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* x86: The LEA/LEA optimisations can now work with a different
destination register and the intermediate register still in use.
This commit is contained in:
J. Gareth "Curious Kit" Moreton
FPK
parent
931bda5633
commit
77f53ebde3
@ -5643,13 +5643,13 @@ unit aoptx86;
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function TX86AsmOptimizer.OptPass1LEA(var p : tai) : boolean;
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var
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hp1: tai;
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hp1, hp2: tai;
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ref: Integer;
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saveref: treference;
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offsetcalc: Int64;
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TempReg: TRegister;
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Multiple: TCGInt;
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Adjacent: Boolean;
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Adjacent, IntermediateRegDiscarded: Boolean;
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begin
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Result:=false;
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@ -5804,7 +5804,6 @@ unit aoptx86;
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begin
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{ Check common LEA/LEA conditions }
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if MatchInstruction(hp1,A_LEA,[taicpu(p).opsize]) and
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(taicpu(p).oper[1]^.reg = taicpu(hp1).oper[1]^.reg) and
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(taicpu(p).oper[0]^.ref^.relsymbol = nil) and
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(taicpu(p).oper[0]^.ref^.segment = NR_NO) and
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(taicpu(p).oper[0]^.ref^.symbol = nil) and
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@ -5827,6 +5826,16 @@ unit aoptx86;
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)
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) then
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begin
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TransferUsedRegs(TmpUsedRegs);
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hp2 := p;
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repeat
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UpdateUsedRegs(TmpUsedRegs, tai(hp2.Next));
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until not GetNextInstruction(hp2, hp2) or (hp2 = hp1);
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IntermediateRegDiscarded :=
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(taicpu(p).oper[1]^.reg = taicpu(hp1).oper[1]^.reg) or
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not RegUsedAfterInstruction(taicpu(p).oper[1]^.reg, hp1, TmpUsedRegs);
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{ changes
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lea offset1(regX,scale), reg1
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lea offset2(reg1,reg1), reg2
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@ -5850,6 +5859,11 @@ unit aoptx86;
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(Similarly, allow the first instruction to be "lea (regX,regX),reg1")
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}
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if (taicpu(p).oper[0]^.ref^.base<>NR_STACK_POINTER_REG) and { lea (%rsp,scale),reg is not a valid encoding }
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(
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{ Don't optimise if size is a concern and the intermediate register remains in use }
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IntermediateRegDiscarded or
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not (cs_opt_size in current_settings.optimizerswitches)
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) and
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(taicpu(hp1).oper[0]^.ref^.index = taicpu(p).oper[1]^.reg) and
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(
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(taicpu(p).oper[0]^.ref^.base <> taicpu(p).oper[0]^.ref^.index) or
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@ -5897,8 +5911,6 @@ unit aoptx86;
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if (offsetcalc <= $7FFFFFFF) and (offsetcalc >= -2147483648) then
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begin
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DebugMsg(SPeepholeOptimization + 'LeaLea2Lea 2 done',p);
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if (taicpu(hp1).oper[0]^.ref^.base = taicpu(p).oper[1]^.reg) and
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(taicpu(hp1).oper[0]^.ref^.index <> taicpu(p).oper[1]^.reg) then
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begin
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@ -5925,7 +5937,16 @@ unit aoptx86;
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if (taicpu(p).oper[0]^.ref^.offset <> 0) then
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Inc(taicpu(hp1).oper[0]^.ref^.offset, taicpu(p).oper[0]^.ref^.offset * max(taicpu(p).oper[0]^.ref^.scalefactor, 1));
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taicpu(hp1).oper[0]^.ref^.index := taicpu(p).oper[0]^.ref^.index;
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RemoveCurrentP(p);
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{ Only remove the first LEA if we don't need the intermediate register's value as is }
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if IntermediateRegDiscarded then
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begin
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DebugMsg(SPeepholeOptimization + 'LeaLea2Lea 2 done',p);
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RemoveCurrentP(p);
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end
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else
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DebugMsg(SPeepholeOptimization + 'LeaLea2LeaLea 2 done (intermediate register still in use)',p);
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result:=true;
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exit;
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end;
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@ -5933,29 +5954,35 @@ unit aoptx86;
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{ changes
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lea offset1(regX), reg1
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lea offset2(reg1), reg1
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lea offset2(reg1), reg2
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to
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lea offset1+offset2(regX), reg1 }
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if
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lea offset1+offset2(regX), reg2 }
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if (
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{ Don't optimise if size is a concern and the intermediate register remains in use }
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IntermediateRegDiscarded or
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not (cs_opt_size in current_settings.optimizerswitches)
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) and
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(
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(taicpu(hp1).oper[0]^.ref^.index = taicpu(p).oper[1]^.reg) and
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(taicpu(p).oper[0]^.ref^.index = NR_NO)
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) or (
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(taicpu(hp1).oper[0]^.ref^.base = taicpu(p).oper[1]^.reg) and
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(taicpu(hp1).oper[0]^.ref^.scalefactor <= 1) and
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(
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(taicpu(hp1).oper[0]^.ref^.index = taicpu(p).oper[1]^.reg) and
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(taicpu(p).oper[0]^.ref^.index = NR_NO)
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) or (
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(taicpu(hp1).oper[0]^.ref^.base = taicpu(p).oper[1]^.reg) and
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(taicpu(hp1).oper[0]^.ref^.scalefactor <= 1) and
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(
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(taicpu(p).oper[0]^.ref^.index = NR_NO) or
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(taicpu(p).oper[0]^.ref^.base = NR_NO)
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) or (
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(taicpu(p).oper[0]^.ref^.scalefactor <= 1) and
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(
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(taicpu(p).oper[0]^.ref^.index = NR_NO) or
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(taicpu(p).oper[0]^.ref^.base = NR_NO)
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) or (
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(taicpu(p).oper[0]^.ref^.scalefactor <= 1) and
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(
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(taicpu(p).oper[0]^.ref^.index = taicpu(p).oper[0]^.ref^.base) and
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(taicpu(p).oper[0]^.ref^.index = NR_NO) or
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(
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(taicpu(hp1).oper[0]^.ref^.index = NR_NO) or
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(taicpu(hp1).oper[0]^.ref^.base = NR_NO)
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(taicpu(p).oper[0]^.ref^.index = taicpu(p).oper[0]^.ref^.base) and
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(
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(taicpu(hp1).oper[0]^.ref^.index = NR_NO) or
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(taicpu(hp1).oper[0]^.ref^.base = NR_NO)
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)
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)
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)
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)
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@ -5963,34 +5990,49 @@ unit aoptx86;
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)
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) then
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begin
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DebugMsg(SPeepholeOptimization + 'LeaLea2Lea 1 done',p);
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{ Make sure the offset doesn't go out of range (use 64-bit arithmetic)}
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offsetcalc := taicpu(hp1).oper[0]^.ref^.offset;
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Inc(offsetcalc, Int64(taicpu(p).oper[0]^.ref^.offset) * max(taicpu(hp1).oper[0]^.ref^.scalefactor, 1));
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if taicpu(hp1).oper[0]^.ref^.index=taicpu(p).oper[1]^.reg then
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if (offsetcalc <= $7FFFFFFF) and (offsetcalc >= -2147483648) then
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begin
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taicpu(hp1).oper[0]^.ref^.index:=taicpu(p).oper[0]^.ref^.base;
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inc(taicpu(hp1).oper[0]^.ref^.offset,taicpu(p).oper[0]^.ref^.offset*max(taicpu(hp1).oper[0]^.ref^.scalefactor,1));
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{ if the register is used as index and base, we have to increase for base as well
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and adapt base }
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if taicpu(hp1).oper[0]^.ref^.base=taicpu(p).oper[1]^.reg then
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if taicpu(hp1).oper[0]^.ref^.index=taicpu(p).oper[1]^.reg then
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begin
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taicpu(hp1).oper[0]^.ref^.index:=taicpu(p).oper[0]^.ref^.base;
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inc(taicpu(hp1).oper[0]^.ref^.offset,taicpu(p).oper[0]^.ref^.offset*max(taicpu(hp1).oper[0]^.ref^.scalefactor,1));
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{ if the register is used as index and base, we have to increase for base as well
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and adapt base }
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if taicpu(hp1).oper[0]^.ref^.base=taicpu(p).oper[1]^.reg then
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begin
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taicpu(hp1).oper[0]^.ref^.base:=taicpu(p).oper[0]^.ref^.base;
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inc(taicpu(hp1).oper[0]^.ref^.offset,taicpu(p).oper[0]^.ref^.offset);
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end;
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end
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else
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begin
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taicpu(hp1).oper[0]^.ref^.base:=taicpu(p).oper[0]^.ref^.base;
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inc(taicpu(hp1).oper[0]^.ref^.offset,taicpu(p).oper[0]^.ref^.offset);
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taicpu(hp1).oper[0]^.ref^.base:=taicpu(p).oper[0]^.ref^.base;
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end;
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end
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else
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begin
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inc(taicpu(hp1).oper[0]^.ref^.offset,taicpu(p).oper[0]^.ref^.offset);
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taicpu(hp1).oper[0]^.ref^.base:=taicpu(p).oper[0]^.ref^.base;
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if taicpu(p).oper[0]^.ref^.index<>NR_NO then
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begin
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taicpu(hp1).oper[0]^.ref^.base:=taicpu(hp1).oper[0]^.ref^.index;
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taicpu(hp1).oper[0]^.ref^.index:=taicpu(p).oper[0]^.ref^.index;
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taicpu(hp1).oper[0]^.ref^.scalefactor:=taicpu(p).oper[0]^.ref^.scalefactor;
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end;
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{ Only remove the first LEA if we don't need the intermediate register's value as is }
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if IntermediateRegDiscarded then
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begin
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DebugMsg(SPeepholeOptimization + 'LeaLea2Lea 1 done',p);
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RemoveCurrentP(p);
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end
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else
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DebugMsg(SPeepholeOptimization + 'LeaLea2LeaLea 1 done (intermediate register still in use)',p);
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result:=true;
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exit;
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end;
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if taicpu(p).oper[0]^.ref^.index<>NR_NO then
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begin
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taicpu(hp1).oper[0]^.ref^.base:=taicpu(hp1).oper[0]^.ref^.index;
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taicpu(hp1).oper[0]^.ref^.index:=taicpu(p).oper[0]^.ref^.index;
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taicpu(hp1).oper[0]^.ref^.scalefactor:=taicpu(p).oper[0]^.ref^.scalefactor;
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end;
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RemoveCurrentP(p);
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result:=true;
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exit;
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end;
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end;
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