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https://gitlab.com/freepascal.org/fpc/source.git
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+ a_call_reg, a_call_loc added
* removed exprasmlist references
This commit is contained in:
peter
parent
b0ffb45275
commit
7898dcf9ed
@ -176,6 +176,9 @@ unit cgobj;
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}
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procedure a_call_name(list : taasmoutput;const s : string);virtual; abstract;
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procedure a_call_ref(list : taasmoutput;const ref : treference);virtual;abstract;
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procedure a_call_reg(list : taasmoutput;reg : tregister);virtual;abstract;
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procedure a_call_loc(list : taasmoutput;const loc:tlocation);
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{ move instructions }
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procedure a_load_const_reg(list : taasmoutput;size : tcgsize;a : aword;register : tregister);virtual; abstract;
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@ -255,7 +258,7 @@ unit cgobj;
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be emitted)
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@param(reg The register to emit the opcode with, returns the register with
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which the opcode will be emitted)
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}
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}
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function optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aword; var reg: tregister): boolean;virtual;
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{#
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@ -449,18 +452,18 @@ unit cgobj;
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procedure a_param64_ref(list : taasmoutput;const r : treference;const loc : tparalocation);virtual;abstract;
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procedure a_param64_loc(list : taasmoutput;const l : tlocation;const loc : tparalocation);virtual;abstract;
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{
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{
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This routine tries to optimize the const_reg opcode, and should be
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called at the start of a_op64_const_reg. It returns the actual opcode
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to emit, and the constant value to emit. If this routine returns
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TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
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@param(op The opcode to emit, returns the opcode which must be emitted)
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@param(a The constant which should be emitted, returns the constant which must
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be emitted)
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@param(reg The register to emit the opcode with, returns the register with
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which the opcode will be emitted)
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}
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}
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function optimize64_op_const_reg(list: taasmoutput; var op: topcg; var a : qword; var reg: tregister64): boolean;virtual;abstract;
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@ -675,7 +678,7 @@ unit cgobj;
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list.concat(taicpu.op_reg(A_PUSH,S_L,pushed_reg));
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end
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else
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tmpreg := rg.getregisterint(exprasmlist)
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tmpreg := rg.getregisterint(list)
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else
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{$endif i386}
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tmpreg := get_scratch_reg_int(list);
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@ -688,7 +691,7 @@ unit cgobj;
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if (pushed_reg <> R_NO) then
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list.concat(taicpu.op_reg(A_POP,S_L,pushed_reg))
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else
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rg.ungetregister(exprasmlist,tmpreg)
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rg.ungetregister(list,tmpreg)
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end
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else
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{$endif i386}
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@ -771,6 +774,19 @@ unit cgobj;
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end;
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procedure tcg.a_call_loc(list : taasmoutput;const loc:tlocation);
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begin
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case loc.loc of
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LOC_REGISTER,LOC_CREGISTER:
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cg.a_call_reg(list,loc.register);
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LOC_REFERENCE,LOC_CREFERENCE :
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cg.a_call_ref(list,loc.reference);
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else
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internalerror(200203311);
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end;
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end;
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function tcg.optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aword; var reg:tregister): boolean;
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var
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powerval : longint;
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@ -817,7 +833,7 @@ unit cgobj;
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end;
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OP_SAR,OP_SHL,OP_SHR:
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begin
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if a = 0 then
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if a = 0 then
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optimize_op_const_reg := true;
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exit;
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end;
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@ -1044,7 +1060,7 @@ unit cgobj;
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{ since all this is only necessary for the 80x86 (because EDI }
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{ doesn't have an 8bit component which is directly addressable) }
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if size in [OS_8,OS_S8] then
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tmpreg := rg.getregisterint(exprasmlist)
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tmpreg := rg.getregisterint(list)
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else
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{$endif i386}
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tmpreg := get_scratch_reg_int(list);
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@ -1053,7 +1069,7 @@ unit cgobj;
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a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
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{$ifdef i386}
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if size in [OS_8,OS_S8] then
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rg.ungetregister(exprasmlist,tmpreg)
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rg.ungetregister(list,tmpreg)
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else
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{$endif i386}
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free_scratch_reg(list,tmpreg);
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@ -1530,7 +1546,7 @@ unit cgobj;
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procedure tcg.g_exception_reason_save(list : taasmoutput; const href : treference);
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begin
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a_load_reg_ref(exprasmlist, OS_S32, accumulator, href);
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a_load_reg_ref(list, OS_S32, accumulator, href);
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end;
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@ -1568,7 +1584,11 @@ finalization
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end.
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{
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$Log$
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Revision 1.53 2002-08-19 18:17:48 carl
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Revision 1.54 2002-09-01 12:09:27 peter
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+ a_call_reg, a_call_loc added
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* removed exprasmlist references
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Revision 1.53 2002/08/19 18:17:48 carl
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+ optimize64_op_const_reg implemented (optimizes 64-bit constant opcodes)
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* more fixes to m68k for 64-bit operations
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@ -1238,14 +1238,14 @@ const
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begin
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a_load_ref_ref(list,int_cgsize(len),source,dest);
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if delsource then
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reference_release(exprasmlist,source);
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reference_release(list,source);
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end
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else
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begin
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a_reg_alloc(list,R_F0);
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a_loadfpu_ref_reg(list,OS_F64,source,R_F0);
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if delsource then
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reference_release(exprasmlist,source);
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reference_release(list,source);
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a_loadfpu_reg_ref(list,OS_F64,R_F0,dest);
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a_reg_dealloc(list,R_F0);
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end;
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@ -1275,7 +1275,7 @@ const
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orgsrc := true;
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end;
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if not orgsrc and delsource then
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reference_release(exprasmlist,source);
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reference_release(list,source);
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{ load the address of dest into dst.base }
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if not issimpleref(dest) or
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((dest.index <> R_NO) and
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@ -1364,7 +1364,7 @@ const
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if orgsrc then
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begin
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if delsource then
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reference_release(exprasmlist,source);
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reference_release(list,source);
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end
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else
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free_scratch_reg(list,src.base);
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@ -1688,7 +1688,11 @@ begin
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end.
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{
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$Log$
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Revision 1.48 2002-08-31 21:38:02 jonas
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Revision 1.49 2002-09-01 12:09:27 peter
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+ a_call_reg, a_call_loc added
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* removed exprasmlist references
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Revision 1.48 2002/08/31 21:38:02 jonas
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* fixed a_call_ref (it should load ctr, not lr)
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Revision 1.47 2002/08/31 21:30:45 florian
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@ -50,6 +50,7 @@ unit cgx86;
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procedure a_call_name(list : taasmoutput;const s : string);override;
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procedure a_call_ref(list : taasmoutput;const ref : treference);override;
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procedure a_call_reg(list : taasmoutput;reg : tregister);override;
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procedure a_op_const_reg(list : taasmoutput; Op: TOpCG; a: AWord; reg: TRegister); override;
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@ -410,6 +411,12 @@ unit cgx86;
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end;
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procedure tcgx86.a_call_reg(list : taasmoutput;reg : tregister);
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begin
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list.concat(taicpu.op_reg(A_CALL,S_NO,reg));
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end;
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{********************** load instructions ********************}
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@ -1644,7 +1651,11 @@ unit cgx86;
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end.
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{
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$Log$
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Revision 1.12 2002-08-17 09:23:50 florian
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Revision 1.13 2002-09-01 12:09:27 peter
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+ a_call_reg, a_call_loc added
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* removed exprasmlist references
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Revision 1.12 2002/08/17 09:23:50 florian
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* first part of procinfo rewrite
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Revision 1.11 2002/08/16 14:25:00 carl
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