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https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-11-02 10:09:35 +01:00
* register fixes
This commit is contained in:
peter
parent
92430d4881
commit
790e125329
@ -37,14 +37,6 @@ interface
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private
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function IsSimpleRef(const ref:treference):boolean;
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public
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{ This method is used to pass a parameter, which is located in a register, to a
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routine. It should give the parameter to the routine, as required by the
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specific processor ABI. It is overriden for each CPU target.
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Size : is the size of the operand in the register
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r : is the register source of the operand
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LocPara : is the location where the parameter will be stored }
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procedure a_param_reg(list:TAasmOutput;sz:tcgsize;r:tregister;const LocPara:TParaLocation);override;
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{ passes a parameter which is a constant to a function }
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procedure a_param_const(list:TAasmOutput;size:tcgsize;a:aword;const LocPara:TParaLocation);override;
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procedure a_param_ref(list:TAasmOutput;sz:tcgsize;const r:TReference;const LocPara:TParaLocation);override;
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procedure a_paramaddr_ref(list:TAasmOutput;const r:TReference;const LocPara:TParaLocation);override;
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@ -141,40 +133,6 @@ implementation
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end;
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procedure TCgSparc.a_param_reg(list:TAasmOutput;sz:tcgsize;r:tregister;const LocPara:TParaLocation);
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var
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zeroreg:Tregister;
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begin
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zeroreg.enum:=R_INTREGISTER;
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zeroreg.number:=NR_G0;
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with list,LocPara do
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case Loc of
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LOC_REGISTER:
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begin
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case Sz of
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OS_8,OS_S8:
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Concat(taicpu.op_Reg_Const_Reg(A_AND,r,$FF,Register));
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OS_16,OS_S16:
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begin
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Concat(taicpu.op_Reg_Reg_Reg(A_AND,r,zeroreg,Register));
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{This will put 00...00111 in the hiest 22 bits of the reg}
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Concat(taicpu.op_Reg_Const_Reg(A_SETHI,Register,$7,Register));
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end;
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OS_32,OS_S32:
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begin
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if r.number<>Register.number then
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Concat(taicpu.op_Reg_Reg_Reg(A_OR,r,zeroreg,Register));
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end;
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else
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InternalError(2002032212);
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end;
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end;
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else
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InternalError(2002101002);
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end;
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end;
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procedure TCgSparc.a_param_const(list:TAasmOutput;size:tcgsize;a:aword;const LocPara:TParaLocation);
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var
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Ref:TReference;
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@ -203,7 +161,7 @@ implementation
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tmpreg:TRegister;
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begin
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with LocPara do
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case locpara.loc of
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case loc of
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LOC_REGISTER,LOC_CREGISTER:
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a_load_ref_reg(list,sz,r,Register);
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LOC_REFERENCE:
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@ -374,14 +332,14 @@ implementation
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procedure TCgSparc.a_load_reg_reg(list:TAasmOutput;fromsize,tosize:tcgsize;reg1,reg2:tregister);
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var
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r : Tregister;
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zeroreg : Tregister;
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begin
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if(reg1.enum<>R_INTREGISTER)or(reg1.number=NR_NO) then
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InternalError(200303101);
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if(reg2.enum<>R_INTREGISTER)or(reg2.number=NR_NO) then
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InternalError(200303102);
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r.enum:=R_INTREGISTER;
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r.Number:=NR_G0;
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zeroreg.enum:=R_INTREGISTER;
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zeroreg.Number:=NR_G0;
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if (reg1.Number<>reg2.Number) or
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(tcgsize2size[tosize]<tcgsize2size[fromsize]) or
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(
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@ -391,8 +349,19 @@ implementation
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) then
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begin
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case tosize of
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OS_8,OS_S8,OS_16,OS_S16,OS_32,OS_S32:
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list.concat(taicpu.op_reg_reg_reg(A_OR,r,reg1,reg2));
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OS_8,OS_S8:
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list.Concat(taicpu.op_Reg_Const_Reg(A_AND,reg1,$FF,reg2));
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OS_16,OS_S16:
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begin
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list.Concat(taicpu.op_Reg_Reg_Reg(A_AND,reg1,zeroreg,reg2));
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{ This will put 00...00111 in the highest 22 bits of the reg }
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list.Concat(taicpu.op_Reg_Const_Reg(A_SETHI,reg2,$7,reg2));
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end;
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OS_32,OS_S32:
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begin
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if reg1.number<>reg2.number then
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list.Concat(taicpu.op_Reg_Reg_Reg(A_OR,zeroreg,reg1,reg2));
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end;
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else
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internalerror(2002090901);
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end;
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@ -617,8 +586,8 @@ implementation
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procedure TCgSparc.g_flags2reg(list:TAasmOutput;Size:TCgSize;const f:tresflags;reg:TRegister);
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var
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ai:taicpu;
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r,hreg:tregister;
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ai : taicpu;
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r : tregister;
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begin
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r.enum:=R_PSR;
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ai:=Taicpu.Op_reg_reg(A_RDPSR,r,reg);
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@ -831,11 +800,10 @@ implementation
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begin
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case op of
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OP_AND,OP_OR,OP_XOR:
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WITH cg DO
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begin
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a_op_const_reg(list,op,Lo(Value),regdst.reglo);
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a_op_const_reg(list,op,Hi(Value),regdst.reghi);
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end;
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begin
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cg.a_op_const_reg(list,op,Lo(Value),regdst.reglo);
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cg.a_op_const_reg(list,op,Hi(Value),regdst.reghi);
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end;
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OP_ADD, OP_SUB:
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begin
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{can't use a_op_const_ref because this may use dec/inc}
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@ -856,12 +824,11 @@ implementation
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begin
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case op of
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OP_AND,OP_OR,OP_XOR:
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with cg do
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begin
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a_op_const_ref(list,op,OS_32,Lo(Value),ref);
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cg.a_op_const_ref(list,op,OS_32,Lo(Value),ref);
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tempref:=ref;
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inc(tempref.offset,4);
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a_op_const_ref(list,op,OS_32,Hi(Value),tempref);
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cg.a_op_const_ref(list,op,OS_32,Hi(Value),tempref);
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end;
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OP_ADD, OP_SUB:
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begin
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@ -1053,7 +1020,10 @@ begin
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end.
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{
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$Log$
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Revision 1.53 2003-05-30 23:57:08 peter
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Revision 1.54 2003-05-31 01:00:51 peter
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* register fixes
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Revision 1.53 2003/05/30 23:57:08 peter
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* more sparc cleanup
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* accumulator removed, splitted in function_return_reg (called) and
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function_result_reg (caller)
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@ -324,38 +324,38 @@ uses
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{Super registers:}
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RS_NO=$00;
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RS_O0=$01;
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RS_O1=$02;
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RS_O2=$03;
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RS_O3=$04;
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RS_O4=$05;
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RS_O5=$06;
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RS_O6=$07;
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RS_O7=$08;
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RS_L0=$09;
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RS_L1=$0A;
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RS_L2=$0B;
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RS_L3=$0C;
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RS_L4=$0D;
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RS_L5=$0E;
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RS_L6=$0F;
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RS_L7=$10;
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RS_I0=$11;
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RS_I1=$12;
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RS_I2=$13;
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RS_I3=$14;
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RS_I4=$15;
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RS_I5=$16;
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RS_I6=$17;
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RS_I7=$18;
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RS_G0=$19;
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RS_G1=$1A;
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RS_G2=$1B;
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RS_G3=$1C;
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RS_G4=$1D;
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RS_G5=$1E;
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RS_G6=$1F;
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RS_G7=$20;
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RS_G0=$01;
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RS_G1=$02;
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RS_G2=$03;
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RS_G3=$04;
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RS_G4=$05;
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RS_G5=$06;
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RS_G6=$07;
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RS_G7=$08;
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RS_O0=$09;
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RS_O1=$0a;
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RS_O2=$0b;
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RS_O3=$0c;
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RS_O4=$0d;
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RS_O5=$0e;
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RS_O6=$0f;
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RS_O7=$10;
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RS_L0=$11;
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RS_L1=$12;
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RS_L2=$13;
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RS_L3=$14;
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RS_L4=$15;
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RS_L5=$16;
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RS_L6=$17;
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RS_L7=$18;
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RS_I0=$19;
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RS_I1=$1a;
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RS_I2=$1b;
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RS_I3=$1c;
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RS_I4=$1d;
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RS_I5=$1e;
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RS_I6=$1f;
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RS_I7=$20;
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first_supreg = $01;
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last_supreg = $20;
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@ -988,17 +988,12 @@ implementation
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procedure convert_register_to_enum(var r:Tregister);
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begin
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with R do
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if(enum=R_INTREGISTER) then
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if(number<=RegEnum2Number[R_I7]) then
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begin
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enum:=Low(enum);
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repeat
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Inc(enum);
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until(number=RegEnum2Number[enum])or(enum=High(enum));
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end
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else
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if (r.enum=R_INTREGISTER) then
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begin
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if r.number>NR_I7 then
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internalerror(200301082);
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r.enum:=toldregister(r.number shr 8);
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end;
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end;
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@ -1010,7 +1005,10 @@ implementation
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end.
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{
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$Log$
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Revision 1.35 2003-05-30 23:57:08 peter
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Revision 1.36 2003-05-31 01:00:51 peter
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* register fixes
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Revision 1.35 2003/05/30 23:57:08 peter
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* more sparc cleanup
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* accumulator removed, splitted in function_return_reg (called) and
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function_result_reg (caller)
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@ -48,8 +48,6 @@ unit cpugas;
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begin
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inc(offset,offsetfixup);
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offsetfixup:=0;
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if (base.enum<>R_INTREGISTER) or (index.enum<>R_INTREGISTER) then
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internalerror(200301081);
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if assigned(symbol) then
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begin
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if (base.number<>NR_NO) or (index.number<>NR_NO) then
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@ -59,21 +57,34 @@ unit cpugas;
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GetReferenceString:=GetReferenceString+'+'+ToStr(offset)
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else if offset<0 then
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GetReferenceString:=GetReferenceString+ToStr(offset);
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if symaddr=refs_hi then
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GetReferenceString:='%hi('+GetReferenceString+')'
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else if symaddr=refs_lo then
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GetReferenceString:='%lo('+GetReferenceString+')'
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else
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internalerror(2003052602);
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case symaddr of
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refs_hi :
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GetReferenceString:='%hi('+GetReferenceString+')';
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refs_lo :
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GetReferenceString:='%lo('+GetReferenceString+')';
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end;
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end
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else
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begin
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GetReferenceString:='[';
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if base.number<>NR_NO then
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GetReferenceString:=std_reg2str[base.enum]+'+';
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GetReferenceString:=GetReferenceString+std_reg2str[base.enum];
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if index.number<>NR_NO then
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GetReferenceString:=GetReferenceString+std_reg2str[index.enum]+'+';
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if Offset<>0 then
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internalerror(2003052603);
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begin
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if (Offset<-4096) or (Offset>4095) then
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internalerror(2003053008);
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if offset>0 then
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GetReferenceString:=GetReferenceString+'+'+ToStr(offset)
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else if offset<0 then
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GetReferenceString:=GetReferenceString+ToStr(offset);
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end
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else
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begin
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if Offset<>0 then
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internalerror(2003052603);
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GetReferenceString:=GetReferenceString+std_reg2str[index.enum]+'+';
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end;
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GetReferenceString:=GetReferenceString+']';
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end;
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end;
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end;
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@ -140,10 +151,10 @@ unit cpugas;
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end;*)
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procedure TGasSPARC.WriteInstruction(hp:Tai);
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var
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Op:TAsmOp;
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s:String;
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i:Integer;
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var
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Op:TAsmOp;
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s:String;
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i:Integer;
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begin
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if hp.typ<>ait_instruction then
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exit;
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@ -196,7 +207,10 @@ begin
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end.
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{
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$Log$
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Revision 1.16 2003-05-30 23:57:08 peter
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Revision 1.17 2003-05-31 01:00:51 peter
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* register fixes
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Revision 1.16 2003/05/30 23:57:08 peter
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* more sparc cleanup
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* accumulator removed, splitted in function_return_reg (called) and
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function_result_reg (caller)
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@ -72,6 +72,7 @@ implementation
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reference.index.number:=NR_FRAME_POINTER_REG;
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reference.offset:=-68-nr*4;
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end;
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size:=OS_INT;
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end;
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end;
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@ -303,7 +304,10 @@ begin
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end.
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{
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$Log$
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Revision 1.17 2003-05-30 23:57:08 peter
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Revision 1.18 2003-05-31 01:00:51 peter
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* register fixes
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Revision 1.17 2003/05/30 23:57:08 peter
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* more sparc cleanup
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* accumulator removed, splitted in function_return_reg (called) and
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function_result_reg (caller)
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@ -43,7 +43,7 @@ function TRgCpu.GetExplicitRegisterInt(list:TAasmOutput;reg:TNewRegister):TRegis
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var
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r:TRegister;
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begin
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if(reg=RS_O7)or(reg=NR_I7)
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if(reg=NR_O7)or(reg=NR_I7)
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then
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begin
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r.enum:=R_INTREGISTER;
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@ -70,7 +70,10 @@ begin
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end.
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{
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$Log$
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Revision 1.9 2003-04-22 10:09:35 daniel
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Revision 1.10 2003-05-31 01:00:51 peter
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* register fixes
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Revision 1.9 2003/04/22 10:09:35 daniel
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+ Implemented the actual register allocator
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+ Scratch registers unavailable when new register allocator used
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+ maybe_save/maybe_restore unavailable when new register allocator used
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