+ support i8086 far data memory models in tcg8086.g_intf_wrapper

git-svn-id: trunk@27722 -
This commit is contained in:
nickysn 2014-05-03 14:17:54 +00:00
parent 8207e0ef22
commit 791cd932fd

View File

@ -2112,7 +2112,6 @@ unit cgcpu;
(hsym.typ=paravarsym)) then (hsym.typ=paravarsym)) then
internalerror(200305251); internalerror(200305251);
paraloc:=tparavarsym(hsym).paraloc[callerside].location; paraloc:=tparavarsym(hsym).paraloc[callerside].location;
while paraloc<>nil do
with paraloc^ do with paraloc^ do
begin begin
case loc of case loc of
@ -2132,12 +2131,14 @@ unit cgcpu;
reference_reset_base(href,NR_DI,reference.offset+return_address_size+2,sizeof(pint)) reference_reset_base(href,NR_DI,reference.offset+return_address_size+2,sizeof(pint))
else else
reference_reset_base(href,NR_DI,reference.offset+return_address_size,sizeof(pint)); reference_reset_base(href,NR_DI,reference.offset+return_address_size,sizeof(pint));
href.segment:=NR_SS;
a_op_const_ref(list,OP_SUB,size,ioffset,href); a_op_const_ref(list,OP_SUB,size,ioffset,href);
list.concat(taicpu.op_reg(A_POP,S_W,NR_DI)); list.concat(taicpu.op_reg(A_POP,S_W,NR_DI));
end end
else else
begin begin
reference_reset_base(href,reference.index,reference.offset+return_address_size,sizeof(pint)); reference_reset_base(href,reference.index,reference.offset+return_address_size,sizeof(pint));
href.segment:=NR_SS;
a_op_const_ref(list,OP_SUB,size,ioffset,href); a_op_const_ref(list,OP_SUB,size,ioffset,href);
end; end;
end end
@ -2201,7 +2202,12 @@ unit cgcpu;
inc(selfoffsetfromsp,2); inc(selfoffsetfromsp,2);
list.concat(taicpu.op_reg_reg(A_mov,S_W,NR_SP,NR_DI)); list.concat(taicpu.op_reg_reg(A_mov,S_W,NR_SP,NR_DI));
reference_reset_base(href,NR_DI,selfoffsetfromsp+offs+2,2); reference_reset_base(href,NR_DI,selfoffsetfromsp+offs+2,2);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_BX); if not segment_regs_equal(NR_SS,NR_DS) then
href.segment:=NR_SS;
if current_settings.x86memorymodel in x86_near_data_models then
cg.a_load_ref_reg(list,OS_16,OS_16,href,NR_BX)
else
list.concat(taicpu.op_ref_reg(A_LES,S_W,href,NR_BX));
list.concat(taicpu.op_reg(A_POP,S_W,NR_DI)); list.concat(taicpu.op_reg(A_POP,S_W,NR_DI));
end end
else else
@ -2214,26 +2220,42 @@ unit cgcpu;
href : treference; href : treference;
begin begin
{ mov 0(%bx),%bx ; load vmt} { mov 0(%bx),%bx ; load vmt}
if current_settings.x86memorymodel in x86_near_data_models then
begin
reference_reset_base(href,NR_BX,0,2); reference_reset_base(href,NR_BX,0,2);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_BX); cg.a_load_ref_reg(list,OS_16,OS_16,href,NR_BX);
end
else
begin
reference_reset_base(href,NR_BX,0,2);
href.segment:=NR_ES;
list.concat(taicpu.op_ref_reg(A_LES,S_W,href,NR_BX));
end;
end; end;
procedure loadmethodoffstobx; procedure loadmethodoffstobx;
var var
href : treference; href : treference;
srcseg: TRegister;
begin begin
if (procdef.extnumber=$ffff) then if (procdef.extnumber=$ffff) then
Internalerror(200006139); Internalerror(200006139);
if current_settings.x86memorymodel in x86_far_data_models then
srcseg:=NR_ES
else
srcseg:=NR_NO;
if current_settings.x86memorymodel in x86_far_code_models then if current_settings.x86memorymodel in x86_far_code_models then
begin begin
{ mov vmtseg(%bx),%si ; method seg } { mov vmtseg(%bx),%si ; method seg }
reference_reset_base(href,NR_BX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber)+2,2); reference_reset_base(href,NR_BX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber)+2,2);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_SI); href.segment:=srcseg;
cg.a_load_ref_reg(list,OS_16,OS_16,href,NR_SI);
end; end;
{ mov vmtoffs(%bx),%bx ; method offs } { mov vmtoffs(%bx),%bx ; method offs }
reference_reset_base(href,NR_BX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),2); reference_reset_base(href,NR_BX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),2);
cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_BX); href.segment:=srcseg;
cg.a_load_ref_reg(list,OS_16,OS_16,href,NR_BX);
end; end;
@ -2288,11 +2310,13 @@ unit cgcpu;
reference_reset_base(href,NR_DI,6,2) reference_reset_base(href,NR_DI,6,2)
else else
reference_reset_base(href,NR_DI,4,2); reference_reset_base(href,NR_DI,4,2);
if not segment_regs_equal(NR_DS,NR_SS) then
href.segment:=NR_SS;
list.concat(taicpu.op_reg_reg(A_MOV,S_W,NR_SP,NR_DI)); list.concat(taicpu.op_reg_reg(A_MOV,S_W,NR_SP,NR_DI));
list.concat(taicpu.op_reg_ref(A_MOV,S_W,NR_BX,href)); list.concat(taicpu.op_reg_ref(A_MOV,S_W,NR_BX,href));
if current_settings.x86memorymodel in x86_far_code_models then if current_settings.x86memorymodel in x86_far_code_models then
begin begin
reference_reset_base(href,NR_DI,8,2); inc(href.offset,2);
list.concat(taicpu.op_reg_ref(A_MOV,S_W,NR_SI,href)); list.concat(taicpu.op_reg_ref(A_MOV,S_W,NR_SI,href));
end; end;