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* patch by Nico Erfurth:

Browse Source 
Inline a couple of small functions of the ARM-Compiler

These small changes improved overall compile times of the fpc suite by
about 2-3% running on an 1.2GHz Kirkwood.

git-svn-id: trunk@21312 -
This commit is contained in:
florian 2012-05-17 08:03:51 +00:00
parent c39d12a618
commit 798c9340cc
1 changed files with 15 additions and 15 deletions
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30
compiler/arm/cpubase.pas
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@ -292,11 +292,11 @@ unit cpubase;
PARENT_FRAMEPOINTER_OFFSET = 0; PARENT_FRAMEPOINTER_OFFSET = 0;
{ Low part of 64bit return value } { Low part of 64bit return value }
function NR_FUNCTION_RESULT64_LOW_REG: tregister; function NR_FUNCTION_RESULT64_LOW_REG: tregister;{$ifdef USEINLINE}inline;{$endif USEINLINE}
function RS_FUNCTION_RESULT64_LOW_REG: shortint; function RS_FUNCTION_RESULT64_LOW_REG: shortint;{$ifdef USEINLINE}inline;{$endif USEINLINE}
{ High part of 64bit return value } { High part of 64bit return value }
function NR_FUNCTION_RESULT64_HIGH_REG: tregister; function NR_FUNCTION_RESULT64_HIGH_REG: tregister;{$ifdef USEINLINE}inline;{$endif USEINLINE}
function RS_FUNCTION_RESULT64_HIGH_REG: shortint; function RS_FUNCTION_RESULT64_HIGH_REG: shortint;{$ifdef USEINLINE}inline;{$endif USEINLINE}
{***************************************************************************** {*****************************************************************************
GCC /ABI linking information GCC /ABI linking information
@ -333,7 +333,7 @@ unit cpubase;
{ Returns the tcgsize corresponding with the size of reg.} { Returns the tcgsize corresponding with the size of reg.}
function reg_cgsize(const reg: tregister) : tcgsize; function reg_cgsize(const reg: tregister) : tcgsize;
function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister; function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
function is_calljmp(o:tasmop):boolean; function is_calljmp(o:tasmop):boolean;{$ifdef USEINLINE}inline;{$endif USEINLINE}
procedure inverse_flags(var f: TResFlags); procedure inverse_flags(var f: TResFlags);
function flags_to_cond(const f: TResFlags) : TAsmCond; function flags_to_cond(const f: TResFlags) : TAsmCond;
function findreg_by_number(r:Tregister):tregisterindex; function findreg_by_number(r:Tregister):tregisterindex;
@ -343,8 +343,8 @@ unit cpubase;
function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE} function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE} function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
procedure shifterop_reset(var so : tshifterop); procedure shifterop_reset(var so : tshifterop); {$ifdef USEINLINE}inline;{$endif USEINLINE}
function is_pc(const r : tregister) : boolean; function is_pc(const r : tregister) : boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
function is_shifter_const(d : aint;var imm_shift : byte) : boolean; function is_shifter_const(d : aint;var imm_shift : byte) : boolean;
function dwarf_reg(r:tregister):shortint; function dwarf_reg(r:tregister):shortint;
@ -414,7 +414,7 @@ unit cpubase;
end; end;
function is_calljmp(o:tasmop):boolean; function is_calljmp(o:tasmop):boolean;{$ifdef USEINLINE}inline;{$endif USEINLINE}
begin begin
{ This isn't 100% perfect because the arm allows jumps also by writing to PC=R15. { This isn't 100% perfect because the arm allows jumps also by writing to PC=R15.
To overcome this problem we simply forbid that FPC generates jumps by loading R15 } To overcome this problem we simply forbid that FPC generates jumps by loading R15 }
@ -468,13 +468,13 @@ unit cpubase;
end; end;
procedure shifterop_reset(var so : tshifterop); procedure shifterop_reset(var so : tshifterop);{$ifdef USEINLINE}inline;{$endif USEINLINE}
begin begin
FillChar(so,sizeof(so),0); FillChar(so,sizeof(so),0);
end; end;
function is_pc(const r : tregister) : boolean; function is_pc(const r : tregister) : boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
begin begin
is_pc:=(r=NR_R15); is_pc:=(r=NR_R15);
end; end;
@ -497,7 +497,7 @@ unit cpubase;
end; end;
function rotl(d : dword;b : byte) : dword; function rotl(d : dword;b : byte) : dword; {$ifdef USEINLINE}inline;{$endif USEINLINE}
begin begin
result:=(d shr (32-b)) or (d shl b); result:=(d shr (32-b)) or (d shl b);
end; end;
@ -543,7 +543,7 @@ unit cpubase;
end; end;
{ Low part of 64bit return value } { Low part of 64bit return value }
function NR_FUNCTION_RESULT64_LOW_REG: tregister; function NR_FUNCTION_RESULT64_LOW_REG: tregister; {$ifdef USEINLINE}inline;{$endif USEINLINE}
begin begin
if target_info.endian=endian_little then if target_info.endian=endian_little then
result:=NR_R0 result:=NR_R0
@ -551,7 +551,7 @@ unit cpubase;
result:=NR_R1; result:=NR_R1;
end; end;
function RS_FUNCTION_RESULT64_LOW_REG: shortint; function RS_FUNCTION_RESULT64_LOW_REG: shortint; {$ifdef USEINLINE}inline;{$endif USEINLINE}
begin begin
if target_info.endian=endian_little then if target_info.endian=endian_little then
result:=RS_R0 result:=RS_R0
@ -560,7 +560,7 @@ unit cpubase;
end; end;
{ High part of 64bit return value } { High part of 64bit return value }
function NR_FUNCTION_RESULT64_HIGH_REG: tregister; function NR_FUNCTION_RESULT64_HIGH_REG: tregister; {$ifdef USEINLINE}inline;{$endif USEINLINE}
begin begin
if target_info.endian=endian_little then if target_info.endian=endian_little then
result:=NR_R1 result:=NR_R1
@ -568,7 +568,7 @@ unit cpubase;
result:=NR_R0; result:=NR_R0;
end; end;
function RS_FUNCTION_RESULT64_HIGH_REG: shortint; function RS_FUNCTION_RESULT64_HIGH_REG: shortint; {$ifdef USEINLINE}inline;{$endif USEINLINE}
begin begin
if target_info.endian=endian_little then if target_info.endian=endian_little then
result:=RS_R1 result:=RS_R1