Fix for multiple exception troubles

git-svn-id: trunk@14218 -
This commit is contained in:
pierre 2009-11-19 21:25:04 +00:00
parent 08350fcc9a
commit 79ec403774
2 changed files with 29 additions and 5 deletions

View File

@ -25,7 +25,7 @@ const
FPE_FLTINV = 7; FPE_FLTINV = 7;
FPE_FLTSUB = 8; FPE_FLTSUB = 8;
procedure SignalToRunerror(sig : longint; SigInfo: PSigInfo; SigContext: PSigContext);public name '_FPC_DEFAULTSIGHANDLER';cdecl; procedure SignalToRunerror(sig : longint; SigInfo: PSigInfo; SigContext: PSigContext);public name '_FPC_DEFAULTSIGHANDLER';cdecl;
var var
res : word; res : word;
@ -59,9 +59,19 @@ begin
res:=206; res:=206;
else else
res:=207; res:=207;
end; end;
end; with sigcontext^.uc_mcontext.fpregs.fpchip_state do
SIGILL, status:=status and not FPU_ExceptionMask;
end;
SIGILL:
if sse_check then
begin
os_supports_sse:=false;
res:=0;
inc(sigcontext^.uc_mcontext.gregs[REG_EIP],3);
end
else
res:=216;
SIGSEGV : SIGSEGV :
begin begin
res:=216; res:=216;
@ -77,8 +87,17 @@ begin
end; end;
reenable_signal(sig); reenable_signal(sig);
{ give runtime error at the position where the signal was raised } { give runtime error at the position where the signal was raised }
{if res<>0 then
HandleErrorAddrFrame(res,addr,frame);}
{ give runtime error at the position where the signal was raised }
if res<>0 then if res<>0 then
HandleErrorAddrFrame(res,addr,frame); begin
sigcontext^.uc_mcontext.gregs[REG_EAX] := res;
sigcontext^.uc_mcontext.gregs[REG_EDX] := sigcontext^.uc_mcontext.gregs[REG_EIP];
sigcontext^.uc_mcontext.gregs[REG_ECX] := sigcontext^.uc_mcontext.gregs[REG_EBP];
sigcontext^.uc_mcontext.gregs[REG_EIP] := ptruint(@HandleErrorAddrFrame);
end;
end; end;

View File

@ -245,6 +245,11 @@ Begin
{ Setup heap } { Setup heap }
InitHeap; InitHeap;
SysInitExceptions; SysInitExceptions;
{$if defined(cpui386) or defined(cpuarm)}
fpc_cpucodeinit;
{$endif cpui386}
{ Setup stdin, stdout and stderr } { Setup stdin, stdout and stderr }
SysInitStdIO; SysInitStdIO;
{ Reset IO Error } { Reset IO Error }