mirror of
https://gitlab.com/freepascal.org/fpc/source.git
synced 2025-09-22 06:09:14 +02:00
Fix for AndLsl2Lsl in ARM Peephole optimizer
AndLsl2Lsl assigned the wrong register to the remaining instruction, and also did not check for the register. git-svn-id: trunk@28285 -
This commit is contained in:
parent
85d208fea4
commit
7a0c79de60
@ -1583,13 +1583,14 @@ Implementation
|
||||
and reg1,reg0,2^n-1
|
||||
mov reg2,reg1, lsl imm1
|
||||
=>
|
||||
mov reg2,reg1, lsl imm1
|
||||
mov reg2,reg0, lsl imm1
|
||||
if imm1>i
|
||||
}
|
||||
else if i>32-taicpu(hp1).oper[2]^.shifterop^.shiftimm then
|
||||
else if (i>32-taicpu(hp1).oper[2]^.shifterop^.shiftimm) and
|
||||
not(RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) then
|
||||
begin
|
||||
DebugMsg('Peephole AndLsl2Lsl done', p);
|
||||
taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[0]^.reg;
|
||||
taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
|
||||
GetNextInstruction(p, hp1);
|
||||
asml.Remove(p);
|
||||
p.free;
|
||||
|
Loading…
Reference in New Issue
Block a user