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+ Load_left_right and clear_left_right implemented fixing test0001 register
allocation bug.
This commit is contained in:
mazen
parent
4cd395a7c2
commit
7b3662c508
@ -28,6 +28,7 @@ type
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TSparcAddNode=class(TAddNode)
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procedure pass_2;override;
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private
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procedure clear_left_right(cmpop:Boolean);
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procedure second_addboolean;
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procedure second_add64bit;
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procedure second_addfloat;
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@ -35,6 +36,7 @@ type
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procedure left_must_be_reg(OpSize:TOpSize;NoSwap:Boolean);
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procedure emit_generic_code(op:TAsmOp;OpSize:TOpSize;unsigned,extra_not,mboverflow:Boolean);
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procedure emit_op_right_left(op:TAsmOp);
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procedure Load_left_right(cmpop,load_constants:Boolean);
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procedure pass_left_and_right;
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procedure set_result_location(cmpOp,unsigned:Boolean);
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end;
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@ -50,6 +52,25 @@ uses
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ncgutil,tgobj,rgobj,rgcpu,cgobj,cg64f32;
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const
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opsize_2_cgSize:array[S_B..S_L]of TCgSize=(OS_8,OS_16,OS_32);
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procedure TSparcAddNode.clear_left_right(cmpop:Boolean);
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begin
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if(right.location.loc in [LOC_REGISTER,LOC_FPUREGISTER])and(cmpop or(location.register.enum <> right.location.register.enum))
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then
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begin
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rg.ungetregister(exprasmlist,right.location.register);
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if is_64bitint(right.resulttype.def)
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then
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rg.ungetregister(exprasmlist,right.location.registerhigh);
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end;
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if(left.location.loc in [LOC_REGISTER,LOC_FPUREGISTER])and(cmpop or(location.register.enum <> left.location.register.enum))
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then
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begin
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rg.ungetregister(exprasmlist,left.location.register);
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if is_64bitint(left.resulttype.def)
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then
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rg.ungetregister(exprasmlist,left.location.registerhigh);
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end;
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end;
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procedure TSparcAddNode.second_addboolean;
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var
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cgop:TOpCg;
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@ -125,7 +146,7 @@ procedure TSparcAddNode.second_addboolean;
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location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def))
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else
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location_reset(location,LOC_FLAGS,OS_NO);
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//load_left_right(cmpop,false);
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load_left_right(cmpop,false);
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if (left.location.loc = LOC_CONSTANT)
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then
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swapleftright;
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@ -197,7 +218,7 @@ procedure TSparcAddNode.second_addboolean;
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end;
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end;
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end;
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// clear_left_right(CmpOp);
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clear_left_right(CmpOp);
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end;
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function TSparcAddNode.GetResFlags(unsigned:Boolean):TResFlags;
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begin
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@ -558,7 +579,7 @@ procedure TSparcAddNode.second_add64bit;
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if not cmpop then
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location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def));
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//load_left_right(cmpop,(cs_check_overflow in aktlocalswitches) and (nodetype in [addn,subn]));
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load_left_right(cmpop,(cs_check_overflow in aktlocalswitches) and (nodetype in [addn,subn]));
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if not(cs_check_overflow in aktlocalswitches) or
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not(nodetype in [addn,subn]) then
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@ -778,9 +799,54 @@ procedure TSparcAddNode.second_add64bit;
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not(nodetype in [equaln,unequaln]) then
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location_reset(location,LOC_JUMP,OS_NO);
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// clear_left_right(cmpop);
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clear_left_right(cmpop);
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end;
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procedure TSparcAddNode.load_left_right(cmpop,load_constants:Boolean);
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procedure load_node(var n:tnode);
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begin
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case n.location.loc of
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LOC_REGISTER:
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if not cmpop
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then
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begin
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location.register := n.location.register;
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if is_64bitint(n.resulttype.def)
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then
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location.registerhigh := n.location.registerhigh;
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end;
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LOC_REFERENCE,LOC_CREFERENCE:
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begin
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location_force_reg(exprasmlist,n.location,def_cgsize(n.resulttype.def),false);
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if not cmpop
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then
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begin
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location.register := n.location.register;
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if is_64bitint(n.resulttype.def)
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then
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location.registerhigh := n.location.registerhigh;
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end;
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end;
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LOC_CONSTANT:
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begin
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if load_constants
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then
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begin
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location_force_reg(exprasmlist,n.location,def_cgsize(n.resulttype.def),false);
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if not cmpop
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then
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location.register := n.location.register;
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if is_64bitint(n.resulttype.def)
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then
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location.registerhigh := n.location.registerhigh;
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end;
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end;
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end;
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end;
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begin
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load_node(left);
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load_node(right);
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end;
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procedure TSparcAddNode.second_addfloat;
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var
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reg : tregister;
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@ -864,7 +930,7 @@ procedure TSparcAddNode.second_addfloat;
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r,left.location.register,right.location.register))
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end;
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// clear_left_right(cmpop);
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clear_left_right(cmpop);
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end;
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procedure TSparcAddNode.set_result_location(cmpOp,unsigned:Boolean);
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begin
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@ -946,8 +1012,7 @@ procedures }
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location_reset(location,LOC_REGISTER,def_cgsize(resulttype.def))
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else
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location_reset(location,LOC_FLAGS,OS_NO);
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//load_left_right(cmpop, (cs_check_overflow in aktlocalswitches) and
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//(nodetype in [addn,subn,muln]));
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load_left_right(cmpop,(cs_check_overflow in aktlocalswitches)and(nodetype in [addn,subn,muln]));
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if(location.register.enum = R_NO)and not(cmpop)
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then
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location.register := rg.getregisterint(exprasmlist);
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@ -1008,7 +1073,7 @@ procedures }
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location_release(exprasmlist,left.location);
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end;
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end;
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//clear_left_right(cmpop);
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clear_left_right(cmpop);
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end;
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procedure TSparcAddNode.pass_left_and_right;
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var
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@ -1046,7 +1111,11 @@ begin
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end.
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{
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$Log$
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Revision 1.8 2003-01-22 20:45:15 mazen
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Revision 1.9 2003-02-13 21:15:18 mazen
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+ Load_left_right and clear_left_right implemented fixing test0001 register
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allocation bug.
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Revision 1.8 2003/01/22 20:45:15 mazen
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* making math code in RTL compiling.
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*NB : This does NOT mean necessary that it will generate correct code!
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