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+ allow the src register size to be different from the op size or the dst

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register size for OP_SHR/OP_SHL/OP_SAR/OP_ROL/OP_ROR in tcgx86.a_op_reg_reg().
  This is required for the in_[shr/shl/sar/rol/ror]_assign_x_y inline nodes.

git-svn-id: trunk@36251 -
This commit is contained in:
nickysn 2017-05-19 14:03:13 +00:00
parent 9e2133c1b1
commit 7b70848d83
1 changed files with 3 additions and 2 deletions
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5
compiler/x86/cgx86.pas
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@ -1991,7 +1991,8 @@ unit cgx86;
dstsize: topsize;
instr:Taicpu;
begin
check_register_size(size,src);
if not(Op in [OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR]) then
check_register_size(size,src);
check_register_size(size,dst);
dstsize := tcgsize2opsize[size];
if (op=OP_MUL) and not (cs_check_overflow in current_settings.localswitches) then
@ -2011,7 +2012,7 @@ unit cgx86;
begin
{ Use ecx to load the value, that allows better coalescing }
getcpuregister(list,REGCX);
a_load_reg_reg(list,size,REGCX_Size,src,REGCX);
a_load_reg_reg(list,reg_cgsize(src),REGCX_Size,src,REGCX);
list.concat(taicpu.op_reg_reg(Topcg2asmop[op],tcgsize2opsize[size],NR_CL,dst));
ungetcpuregister(list,REGCX);
end;