paweld/fpc
1
0
Fork 0
mirror of https://gitlab.com/freepascal.org/fpc/source.git synced 2025-08-13 05:40:20 +02:00
Code Issues Packages Projects Releases Wiki Activity

* menuitem fix

Browse Source 
git-svn-id: trunk@3327 -
This commit is contained in:
peter 2006-04-23 21:09:41 +00:00
parent 70e7546d87
commit 7dc4afdb59
1 changed files with 20 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

40
rtl/win/wininc/struct.inc
View File

@ -1062,7 +1062,7 @@
Esp : DWORD; Esp : DWORD;
SegSs : DWORD; SegSs : DWORD;
end; end;
{$endif} {$endif}
{$ifdef cpux86_64} {$ifdef cpux86_64}
{$define __HASCONTEXT__} {$define __HASCONTEXT__}
@ -1149,32 +1149,32 @@
{$note todo, fix alignment } {$note todo, fix alignment }
type type
CONTEXT = record CONTEXT = record
// //
// Register parameter home addresses. // Register parameter home addresses.
// //
// N.B. These fields are for convience - they could be used to extend the // N.B. These fields are for convience - they could be used to extend the
// context record in the future. // context record in the future.
// //
P1Home: DWORD64; P1Home: DWORD64;
P2Home: DWORD64; P2Home: DWORD64;
P3Home: DWORD64; P3Home: DWORD64;
P4Home: DWORD64; P4Home: DWORD64;
P5Home: DWORD64; P5Home: DWORD64;
P6Home: DWORD64; P6Home: DWORD64;
// //
// Control flags. // Control flags.
// //
ContextFlags: DWORD; ContextFlags: DWORD;
MxCsr: DWORD; MxCsr: DWORD;
// //
// Segment Registers and processor flags. // Segment Registers and processor flags.
// //
SegCs: WORD; SegCs: WORD;
SegDs: WORD; SegDs: WORD;
SegEs: WORD; SegEs: WORD;
@ -1182,22 +1182,22 @@
SegGs: WORD; SegGs: WORD;
SegSs: WORD; SegSs: WORD;
EFlags: DWORD; EFlags: DWORD;
// //
// Debug registers // Debug registers
// //
Dr0: DWORD64; Dr0: DWORD64;
Dr1: DWORD64; Dr1: DWORD64;
Dr2: DWORD64; Dr2: DWORD64;
Dr3: DWORD64; Dr3: DWORD64;
Dr6: DWORD64; Dr6: DWORD64;
Dr7: DWORD64; Dr7: DWORD64;
// //
// Integer registers. // Integer registers.
// //
Rax: DWORD64; Rax: DWORD64;
Rcx: DWORD64; Rcx: DWORD64;
Rdx: DWORD64; Rdx: DWORD64;
@ -1214,17 +1214,17 @@
R13: DWORD64; R13: DWORD64;
R14: DWORD64; R14: DWORD64;
R15: DWORD64; R15: DWORD64;
// //
// Program counter. // Program counter.
// //
Rip: DWORD64; Rip: DWORD64;
// //
// Floating point state. // Floating point state.
// //
FltSave: XMM_SAVE_AREA32; // MWE: only translated the FltSave part of the union FltSave: XMM_SAVE_AREA32; // MWE: only translated the FltSave part of the union
(* (*
union { union {
@ -1251,18 +1251,18 @@
}; };
}; };
*) *)
// //
// Vector registers. // Vector registers.
// //
VectorRegister: array[0..25] of M128A; VectorRegister: array[0..25] of M128A;
VectorControl: DWORD64; VectorControl: DWORD64;
// //
// Special debug control registers. // Special debug control registers.
// //
DebugControl: DWORD64; DebugControl: DWORD64;
LastBranchToRip: DWORD64; LastBranchToRip: DWORD64;
LastBranchFromRip: DWORD64; LastBranchFromRip: DWORD64;
@ -4184,7 +4184,7 @@
hSubMenu : HMENU; hSubMenu : HMENU;
hbmpChecked : HBITMAP; hbmpChecked : HBITMAP;
hbmpUnchecked : HBITMAP; hbmpUnchecked : HBITMAP;
dwItemData : DWORD; dwItemData : ULONG_PTR;
dwTypeData : LPTSTR; dwTypeData : LPTSTR;
cch : UINT; cch : UINT;
hbmpItem : HBITMAP; hbmpItem : HBITMAP;