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* fpc_mul_qword uses always the assembler implementation
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@ -174,64 +174,45 @@
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function fpc_mul_qword(f1,f2 : qword;checkoverflow : longbool) : qword;[public,alias: 'FPC_MUL_QWORD']; {$ifdef hascompilerproc} compilerproc; {$endif}
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var
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_f1,bitpos : qword;
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l : longint;
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_f1 : qword;
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r : qword;
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begin
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if not(checkoverflow) then
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begin
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{ the following piece of code is taken from the }
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{ AMD Athlon Processor x86 Code Optimization manual }
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asm
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movl f1+4,%edx
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movl f2+4,%ecx
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orl %ecx,%edx
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movl f2,%edx
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movl f1,%eax
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jnz .Lqwordmultwomul
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mull %edx
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jmp .Lqwordmulready
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.Lqwordmultwomul:
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imul f1+4,%edx
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imul %eax,%ecx
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addl %edx,%ecx
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mull f2
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add %ecx,%edx
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.Lqwordmulready:
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movl %eax,r
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movl %edx,r+4
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end [ 'eax','edx','ecx' ];
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fpc_mul_qword:=r;
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end
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else
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begin
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fpc_mul_qword:=0;
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bitpos:=1;
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// store f1 for overflow checking
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_f1:=f1;
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for l:=0 to 63 do
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begin
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if (f2 and bitpos)<>0 then
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fpc_mul_qword:=fpc_mul_qword+f1;
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f1:=f1 shl 1;
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bitpos:=bitpos shl 1;
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end;
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{ if one of the operands is greater than the result an }
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{ overflow occurs }
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if checkoverflow and (_f1 <> 0) and (f2 <>0) and
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((_f1>fpc_mul_qword) or (f2>fpc_mul_qword)) then
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HandleErrorFrame(215,get_frame);
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end;
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_f1:=f1;
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{ the following piece of code is taken from the
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AMD Athlon Processor x86 Code Optimization manual }
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asm
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movl f1+4,%edx
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movl f2+4,%ecx
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orl %ecx,%edx
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movl f2,%edx
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movl f1,%eax
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jnz .Lqwordmultwomul
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mull %edx
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jmp .Lqwordmulready
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.Lqwordmultwomul:
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imul f1+4,%edx
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imul %eax,%ecx
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addl %edx,%ecx
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mull f2
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add %ecx,%edx
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.Lqwordmulready:
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movl %eax,r
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movl %edx,r+4
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end [ 'eax','edx','ecx' ];
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fpc_mul_qword:=r;
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{ if one of the operands is greater than the result an
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overflow occurs }
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if checkoverflow and (_f1<>0) and (f2<>0) and
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((_f1>fpc_mul_qword) or (f2>fpc_mul_qword)) then
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HandleErrorFrame(215,get_frame);
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end;
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{
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$Log$
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Revision 1.2 2003-12-23 23:09:43 peter
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Revision 1.3 2004-05-10 20:58:20 florian
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* fpc_mul_qword uses always the assembler implementation
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Revision 1.2 2003/12/23 23:09:43 peter
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* fix call to handleerror for regcall
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Revision 1.1 2003/09/14 11:34:13 peter
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