From 7f8f733963df9d4afa363f206ee71aa50f619cf7 Mon Sep 17 00:00:00 2001 From: florian Date: Sat, 12 Sep 2020 21:32:11 +0000 Subject: [PATCH] * RiscV32 correctly set operands of div/mod operations, resolves #37743 git-svn-id: trunk@46859 - --- compiler/riscv32/nrv32mat.pas | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/compiler/riscv32/nrv32mat.pas b/compiler/riscv32/nrv32mat.pas index dda288277f..a4f9ae0b95 100644 --- a/compiler/riscv32/nrv32mat.pas +++ b/compiler/riscv32/nrv32mat.pas @@ -100,7 +100,7 @@ implementation else op:=A_DIVU; - current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg_reg(op,denum,num,denum)); + current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg_reg(op,num,num,denum)); end; procedure trv32moddivnode.emit_mod_reg_reg(signed: boolean; denum, num: tregister); @@ -112,7 +112,7 @@ implementation else op:=A_REMU; - current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg_reg(op,denum,num,denum)); + current_asmdata.CurrAsmList.Concat(taicpu.op_reg_reg_reg(op,num,num,denum)); end;