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m68k: added more cpu capabilities (unaligned access, long addressing, various MULx), and the 68060 cpu target

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git-svn-id: trunk@33804 -
This commit is contained in:
Károly Balogh 2016-05-25 22:14:58 +00:00
parent cf6f3b7024
commit 7fbae10515
1 changed files with 20 additions and 8 deletions
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28
compiler/m68k/cpuinfo.pas
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@ -38,6 +38,7 @@ Type
cpu_MC68000,
cpu_MC68020,
cpu_MC68040,
cpu_MC68060,
cpu_isa_a,
cpu_isa_a_p,
cpu_isa_b,
@ -94,6 +95,7 @@ Const
'68000',
'68020',
'68040',
'68060',
'ISAA',
'ISAA+',
'ISAB',
@ -105,6 +107,7 @@ Const
'68000',
'68020',
'68040',
'68060',
'isaa',
'isaaplus',
'isab',
@ -143,25 +146,34 @@ type
CPUM68K_HAS_BRAL, { CPU supports the BRA.L/Bcc.L instructions }
CPUM68K_HAS_ROLROR, { CPU supports the ROL/ROR and ROXL/ROXR instructions }
CPUM68K_HAS_BYTEREV, { CPU supports the BYTEREV instruction }
CPUM68K_HAS_MVSMVZ { CPU supports the MVZ and MVS instructions }
CPUM68K_HAS_MVSMVZ, { CPU supports the MVZ and MVS instructions }
CPUM68K_HAS_MOVE16, { CPU supports the MOVE16 instruction }
CPUM68K_HAS_32BITMUL, { CPU supports MULS/MULU 32x32 -> 32bit }
CPUM68K_HAS_64BITMUL, { CPU supports MULS/MULU 32x32 -> 64bit }
CPUM68K_HAS_UNALIGNED, { CPU supports unaligned access }
CPUM68K_HAS_BASEDISP { CPU supports addressing with 32bit base displacements }
);
const
cpu_capabilities : array[tcputype] of set of tcpuflags =
( { cpu_none } [],
{ cpu_68000 } [CPUM68K_HAS_DBRA,CPUM68K_HAS_TAS,CPUM68K_HAS_ROLROR],
{ cpu_68020 } [CPUM68K_HAS_DBRA,CPUM68K_HAS_CAS,CPUM68K_HAS_TAS,CPUM68K_HAS_BRAL,CPUM68K_HAS_ROLROR],
{ cpu_68040 } [CPUM68K_HAS_DBRA,CPUM68K_HAS_CAS,CPUM68K_HAS_TAS,CPUM68K_HAS_BRAL,CPUM68K_HAS_ROLROR],
{ cpu_isaa } [],
{ cpu_isaap } [CPUM68K_HAS_BRAL,CPUM68K_HAS_BYTEREV],
{ cpu_isab } [CPUM68K_HAS_TAS,CPUM68K_HAS_BRAL,CPUM68K_HAS_MVSMVZ],
{ cpu_isac } [CPUM68K_HAS_TAS,CPUM68K_HAS_BYTEREV,CPUM68K_HAS_MVSMVZ],
{ cpu_cfv4e } [CPUM68K_HAS_TAS,CPUM68K_HAS_BRAL,CPUM68K_HAS_MVSMVZ]
{ cpu_68020 } [CPUM68K_HAS_DBRA,CPUM68K_HAS_CAS,CPUM68K_HAS_TAS,CPUM68K_HAS_BRAL,CPUM68K_HAS_ROLROR,CPUM68K_HAS_UNALIGNED,CPUM68K_HAS_BASEDISP,CPUM68K_HAS_32BITMUL,CPUM68K_HAS_64BITMUL],
{ cpu_68040 } [CPUM68K_HAS_DBRA,CPUM68K_HAS_CAS,CPUM68K_HAS_TAS,CPUM68K_HAS_BRAL,CPUM68K_HAS_ROLROR,CPUM68K_HAS_UNALIGNED,CPUM68K_HAS_BASEDISP,CPUM68K_HAS_32BITMUL,CPUM68K_HAS_64BITMUL,CPUM68K_HAS_MOVE16],
{ cpu_68060 } [CPUM68K_HAS_DBRA,CPUM68K_HAS_CAS,CPUM68K_HAS_TAS,CPUM68K_HAS_BRAL,CPUM68K_HAS_ROLROR,CPUM68K_HAS_UNALIGNED,CPUM68K_HAS_BASEDISP,CPUM68K_HAS_32BITMUL,CPUM68K_HAS_MOVE16],
{ cpu_isaa } [CPUM68K_HAS_UNALIGNED,CPUM68K_HAS_32BITMUL],
{ cpu_isaap } [CPUM68K_HAS_BRAL,CPUM68K_HAS_BYTEREV,CPUM68K_HAS_UNALIGNED,CPUM68K_HAS_32BITMUL],
{ cpu_isab } [CPUM68K_HAS_TAS,CPUM68K_HAS_BRAL,CPUM68K_HAS_MVSMVZ,CPUM68K_HAS_UNALIGNED,CPUM68K_HAS_32BITMUL],
{ cpu_isac } [CPUM68K_HAS_TAS,CPUM68K_HAS_BYTEREV,CPUM68K_HAS_MVSMVZ,CPUM68K_HAS_UNALIGNED,CPUM68K_HAS_32BITMUL],
{ cpu_cfv4e } [CPUM68K_HAS_TAS,CPUM68K_HAS_BRAL,CPUM68K_HAS_MVSMVZ,CPUM68K_HAS_UNALIGNED,CPUM68K_HAS_32BITMUL]
);
{ all CPUs commonly called "coldfire" }
cpu_coldfire = [cpu_isa_a,cpu_isa_a_p,cpu_isa_b,cpu_isa_c,cpu_cfv4e];
{ all CPUs commonly called "68020+" }
cpu_mc68020p = [cpu_mc68020,cpu_mc68040,cpu_mc68060];
Implementation
end.